AS2534 AMSCO [austriamicrosystems AG], AS2534 Datasheet - Page 5

• Manufacturer Part Number: AS2534
• Description: Multi-Standard CMOS Single Chip Telephone IC with Dual Soft Clipping
• Manufacturer: AMSCO [austriamicrosystems AG]

Data Sheet
Keyboard Connections Continued
Power On Reset
The on chip power on reset circuit monitors the supply
voltage (V
approx. 1.2V, a power on reset occurs which clears the
RAM.
DC Conditions
The normal operating range is from 13 mA to 100 mA.
Operating range with reduced performance is from 5 mA
to 13 mA (parallel operation). In the operating range all
functions are operational.
At line currents below 13 mA the AS253x provides an
additional slope below 4.5V in order to allow parallel
operation (see figure 13).
The dc characteristic (excluding diode bridge) is
determined by the voltage at LI and the resistor R1 at line
currents above 13 mA as follows:
The voltage at LI is 4.5V in the normal operating range.
During pulse dialling the speech circuit and other part of
Rev. 7
DD
) during off-hook. When V
R1
R2
R3
R4
V
LS
V
LI
L
P
L
P
M
M
M
M
M
M
N
C1
N
/
/
4
8
#
4
8
#
M
M
1
5
9
1
5
9
I
R
R
LINE
R1
V
V
M
M
DD
R
M
M
R
M
M
C2
O
O
1
5
9
1
1
5
9
1
rises above
1
1
2
6
2
6
L
0
L
0
Figure 2c (AS2535)
M
M
M
M
M
M
R
R
C3
+
+
2
6
0
1
2
6
0
1
2
3
7
2
3
7
5
1
1
(Either VOL or +/– keys)
the device not operating is in a power down mode to
save current. The CS pin is pulled to V
the external shunt transistor on to keep a low voltage
drop at the LS pin during make periods.
AC Impedance
The ac impedance of the circuit is set by external
components. The impedance can be real or complex.
The ac impedance is determined as follows:
The dc value of Z1 should be 30
performance.
Return loss and side tone cancellation can be determined
independant of each other.
Speech Circuit
The speech circuit consists of a transmit and a receive
path with dual soft clipping, mute, line loss compensation
and sidetone cancellation.
Transmit
The gain of the transmit path is 37 dB for 600
termination from M1/M2 to LS (see test circuit figure 10).
M
M
M
M
R
M
M
R
C4
–
3
7
*
–
3
7
1
*
1
3
3
4
8
4
8
2
2
Z
AC
33 Z 1
to maintain correct dc
SS
AS2533...6
in order to turn
July 1998
line