HN58X2408FPIAG RENESAS [Renesas Technology Corp], HN58X2408FPIAG Datasheet - Page 13
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HN58X2408FPIAG
Manufacturer Part Number
HN58X2408FPIAG
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HN58X2408FPIAG.pdf
(21 pages)
HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
Page Write:
The EEPROM is capable of the page write operation which allows any number of bytes up to 32 bytes to
be written in a single write cycle. The page write is the same sequence as the byte write except for
inputting the more write data. The page write is initiated by a start condition, device address word,
memory address(n) and write data(Dn) with every ninth bit acknowledgment. The EEPROM enters the
page write operation if the EEPROM receives more write data(Dn+1) instead of receiving a stop condition.
The a0 to a4 address bits are automatically incremented upon receiving write data(Dn+1). The EEPROM
can continue to receive write data up to 32 bytes. If the a0 to a4 address bits reaches the last address of the
page, the a0 to a4 address bits will roll over to the first address of the same page and previous write data
will be overwritten. Upon receiving a stop condition, the EEPROM stops receiving write data and enters
internally-timed write cycle.
Page Write Operation
Rev.3.00, Dec.21.2004, page 13 of 19
Notes: 1. Don‘t care bits for 32k and 64k.
8k to
32k to
16k
64k
Start
Start
2. Don‘t care bit for 32k.
1 0 1 0
1 0 1 0
Device
address
Device
address
W
W
R/W
R/W
Memory
address (n)
1st Memory
address (n)
ACK
ACK
Write data (n)
ACK
ACK
2nd Memory
address (n)
ACK
Write data (n+m)
ACK
Write data (n)
Write data (n+m)
ACK
ACK
Stop
ACK
Stop