DS5000 Dallas Semiconducotr, DS5000 Datasheet
DS5000
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DS5000 Summary of contents
Page 1
... Optional Permanently Powered Real–Time Clock (DS5000T) DESCRIPTION The DS5000(T) Soft Microcontroller Module is a fully 8051 compatible 8–bit CMOS microcontroller that offers “softness” in all aspects of its application. This is ac- complished through the comprehensive use of nonvola- tile technology to preserve all information in the ab- sence of system V ...
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... DS5000T–32–16 32K bytes Operating information is contained in the User’s Guide section of the Secure Microcontroller Data Book. This data sheet provides ordering information, pinout, and electrical specification. DS5000(T) BLOCK DIAGRAM Figure 1 DS5000( P0.0–0.7 Î Î Î Î Î ...
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... PSEN also is used to invoke the Bootstrap Loader. At this time, PSEN will be pulled down externally. This should only be done once the DS5000(T) is already in a reset state. The device that pulls down should be open drain since it must not interfere with PSEN under normal operation ...
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... A full description of the RTC access and example software is given in the User’s Guide section of the Secure Microcontroller Data Book. If the ECE2 bit is set on a DS5000 without a timekeeper, the MOVXs will simply nonexistent memory. Software execution would not be affected otherwise. ...
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... RST pin and forcing the PSEN line to a logic 0 level. Immediately following this action, the DS5000(T) will look for a paral- lel Program Load pulse serial ASCII carriage return (0DH) character received at 9600, 2400, 1200, or 300 bps over the serial port ...
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... The hardware configuration which is re- quired for the Serial Program Load mode is illustrated in Figure 3. Port pins 2.7 and 2.6 must be either open or pulled high to avoid placing the DS5000( parallel load cycle. Although an 11.0592 MHz crystal is shown in Figure 3, a variety of crystal frequencies and loader baud rates are supported, shown in Table 2. The serial loader is designed to operate across a three– ...
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... The Parallel Program Cycle is used to load a byte of data into a register or memory location within the DS5000(T). The Verify Cycle is used to read this byte back for comparison with the originally loaded value to verify proper load ing. The Security Set Cycle may be used to enable and the Software Security feature of the DS5000(T) ...
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... Kit allows the user to download Intel hex formatted code directly to the DS5000(T) from a PC–XT/AT or compat- ible computer. The kit consists of a DS5000T–32, an in- terface pod, demo software, and an RS232 connector that attaches to the COM1 or COM2 serial port of a PC. ...
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... Programming Supply Voltage V PP (Parallel Program Mode) Program Supply Current I PP Operating Current DS5000–8K@8 MHz I CC DS5000–32K @ 12 MHz DS5000T–32– MHz Idle Mode Current @ 12 MHz I CC DS5000(T) –0.3V to +7. – +70 C 260 C for 10 seconds ( to70 C; V ...
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... DS5000(T) AC CHARACTERISTICS EXPANDED BUS MODE TIMING SPECIFICATIONS # PARAMETER 1 Oscillator Frequency 2 ALE Pulse Width 3 Address Valid to ALE Low 4 Address Hold After ALE Low 5 ALE Low to Valid Instr. In @12 MHz @16 MHz 6 ALE Low to PSEN Low 7 PSEN Pulse Width 8 PSEN Low to Valid Instr. In @12 MHz ...
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... EXPANDED DATA MEMORY READ CYCLE ALE PSEN A7–A0 PORT 0 (Rn OR DPL PORT 2 P2.7–P2.0 OR A15–A8 FROM DPH INSTR IN A7–A0 A15– A7–A0 DATA IN (PCL) A15–A8 FROM PCH DS5000(T) INSTR IN 021998 11/19 ...
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... DS5000(T) EXPANDED DATA MEMORY WRITE CYCLE ALE PSEN A7–A0 PORT 0 (Rn OR DPL) 22 PORT 2 P2.7–P2.0 OR A15–A8 FROM PDH EXTERNAL CLOCK TIMING 021998 12/ A7–A0 DATA OUT (PCL) A15–A8 FROM PCH 30 1 INSTR IN ...
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... SPCLK CLK t 10t –133 DOCH CLK t 2t –117 CHDO CLK t 10t –133 CHDV CLK t 0 CHDIV VALID VALID VALID VALID VALID DS5000( 5%) UNITS 5%) UNITS SET TI SET RI 021998 13/19 ...
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... DS5000(T) AC CHARACTERISTICS (cont’d) POWER CYCLING TIMING # PARAMETER 32 Slew Rate from V to 3.3V CCmin 33 Crystal Start up Time 34 Power–On Reset Delay POWER CYCLE TIMING PFW V CCMIN INTERRUPT SERVICE ROUTINE CLOCK OSC INTERNAL RESET LITHIUM CURRENT 021998 14/ to70 5%) ...
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... PRHAV t 0 DVPRL t 0 PRHDV t 0 P27HVP t 0 VPHPRL t 0 PRHVPL t 2400 PRW t 48 AVDV 1800 DVP27L 1800 P27HDZ 1800* t 21504 PORPV t 1200 RAVPH t 1200 VPPPC t 48 VFT 2400* 021998 15/19 DS5000(T) t CLK t CLK t CLK t CLK t CLK t CLK t CLK t CLK ...
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... DS5000(T) PARALLEL PROGRAM LOAD TIMING P2.3–P2.0 ADDRESS P1.7–P1 PORT DATA 43 44 ALE/PROG EA P2.7, P2.6, P2.5 ACTIVE + RST PSEN CAPACITANCE PARAMETER SYMBOL Output Capacitance C O Input Capacitance C I 021998 16/19 ADDRESS ADDRESS 49 DATA DATA (test frequency = 1 MHz; t ...
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... DS5000(T) TYPICAL I VS. FREQUENCY CC 45.0 40.0 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0 0.0 FREQUENCY OF OPERATION (MHz) Normal operation is measured using: 1) External crystals on XTAL1 and 2 2) All port pins disconnected 3) RST=0 volts and EA=V 4) Part performing endless loop writing to internal memory. Idle mode operation is measured using: 1) External clock source at XTAL1; XTAL2 floating ...
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... DS5000(T) NOTES: 1. All voltages are referenced to ground. 2. Maximum operating I is measured with all output pins disconnected; XTAL1 driven with 0.5V; XTAL2 disconnected RST = PORT0 = Idle mode I is measured with all output pins disconnected; XTAL1 driven with t CC XTAL2 disconnected PORT0 = V ...
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... DATA SHEET REVISION SUMMARY The following represent the key differences between the dates 07/20/95 to 07/24/96 of the DS5000(T) data sheet. Please review this summary carefully. 1. Correct Figure 3 to show RST active high. 2. Add Data Sheet Revision Summary. DS5000(T) 021998 19/19 ...