HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 197

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HD6413308

Manufacturer Part Number
HD6413308
Description
Hitachi Single-Chip MicroComputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Bit 4 – Parity Mode (O/E ): In asynchronous mode, when parity is enabled (PE = “1”), this bit
selects even or odd parity.
Even parity means that a parity bit is added to the data bits for each character to make the total
number of 1’s even. Odd parity means that the total number of 1’s is made odd.
This bit is ignored when PE = “0,” and in the synchronous mode.
Bit 4
O/E
Bit 3 – Stop Bit Length (STOP): This bit selects the number of stop bits. It is ignored in the
synchronous mode.
Bit 3
STOP
Bit 2 – Reserved: This bit cannot be modified and is always read as “1.”
Bits 1 and 0 – Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source when the baud rate generator is clocked from within the H8/330 chip.
Bit 1
CKS1
0
0
1
1
For further information about SMR settings, see Tables 9-5 to 9-7 in Section 9.3, "Operation."
0
1
0
1
Description
Even parity.
Odd parity.
Description
1 Stop bit.
2 Stop bits.
Bit 0
CKS0
0
1
0
1
Description
Ø clock
Ø/4 clock
Ø/16 clock
Ø/64 clock
184
(Initial value)
(Initial value)
(Initial value)

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