HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 200

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

9.2.7 Serial Status Register (SSR) – H’FFDC
Bit
Initial value
Read/Write
* Software can write a “0” to clear the flags, but cannot write a “1” in these bits.
The SSR is an 8-bit register that indicates transmit and receive status. It is initialized to H’87 at a
reset and in the standby modes.
Bit 7 – Transmit Data Register Empty (TDRE): This bit indicates when the TDR contents have
been transferred to the TSR and the next character can safely be written in the TDR.
Bit 7
TDRE
Bit 6 – Receive Data Register Full (RDRF): This bit indicates when one character has been
received and transferred to the RDR.
Bit 6
RDRF
0
1
0
1
Description
This bit is set to 1 at the following times:
(1)
(2)
Description
To clear RDRF, the CPU must read RDRF after
it has been set to "1," then write a “0” in this bit.
This bit is set to 1 when one character is received without error and
transferred from the RSR to the RDR.
To clear TDRE, the CPU must read TDRE after it has been set to "1," then write a “0”
in this bit.
R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
TDRE
When TDR contents are transferred to the TSR.
When the TE bit in the SCR is cleared to "0."
7
1
RDRF
6
0
ORER
5
0
187
FER
4
0
PER
3
0
—
—
2
1
—
—
1
1
(Initial value)
(Initial value)
—
—
0
1