HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 209

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HD6413308

Manufacturer Part Number
HD6413308
Description
Hitachi Single-Chip MicroComputer
Manufacturer
Hitachi Semiconductor
Datasheet

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(3) Data Transmission and Reception
• SCI Initialization: Before data can be transmitted or received, the SCI must be initialized by
The TE and RE bits must both be cleared to “0” whenever the operating mode or data format is
changed.
After changing the operating mode or data format, before setting the TE and RE bits to “1”
software must wait for at least the transfer time for 1 bit at the selected baud rate, to make sure the
SCI is initialized. If an external clock is used, the clock must not be stopped.
When clearing the TDRE bit during data transmission, to assure transfer of the correct data, do not
clear the TDRE bit until after writing data in the TDR. Similarly, in receiving data, do not clear the
RDRF bit until after reading data from the RDR.
• Data Transmission: The procedure for transmitting data is as follows.
software. To initialize the SCI, software must clear the TE and RE bits to “0,” then execute the
following procedure.
Write the value corresponding to the desired bit rate in the BRR. (This step is not necessary if
an external clock is used.)
Select the desired communication parameters in the SCR. Leave bit 0 (CKE0) cleared to zero.
Select clocked synchronous mode in the SMR.
Set the TE and/or RE bit in the SCR to “1.”
Set up the desired transmitting conditions in the SMR, SCR, and BRR.
Set the TE bit in the SCR to “1.”
The ATxD pin will automatically be switched to output and one frame* of all 1’s will be
transmitted, after which the SCI is ready to transmit data.
Check that the TDRE bit is set to “1,” then write the first byte of transmit data in the TDR.
Next clear the TDRE bit to “0.”
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