HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 232

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

Note: If the ADST bit is cleared to "0" when two or more channels are selected in the scan mode,
incorrect values may be left in the A/D data registers.
For this reason, in the scan mode the A/D data registers should be read while the ADST bit is still
set to "1."
Example: The following coding example sets up a four-channel A/D scan, and shows the first part
of an ADI interrupt handler for reading the converted data. Note that the data are read before the
ADST bit is cleared.
ADI:
(It is not necessary to clear the ADST bit in order to read ADDRA to ADDRD.)
10.3.3 Input Sampling Time and A/D Conversion Time
The A/D converter includes a built-in sample-and-hold circuit. Sampling of the input starts at a
time t
conversion begins after sampling is completed. Figure 10-5 shows the timing of these steps. Table
10-4 (a) lists the conversion times for the single mode. Table 10-4 (b) lists the conversion times for
the scan mode.
The total conversion time (t
ADCSR write time with the A/D conversion process, so the length of t
conversion time therefore varies within the minimum to maximum ranges indicated in table 10-4
(a) and (b).
D
after the ADST bit is set to "1." The sampling process lasts for a time t
MOV.B
MOV.B
BSET
MOV.B
MOV.B
MOV.B
MOV.B
BCLR
BCLR
#5B
R0L
#5
(Conversion of four channels)
@ADDRA
@ADDRB
@ADDRC
@ADDRD
#5
#7
CONV
, R0L
, @ADCSR ; Four-channel scan mode
, @ADCSR ; Start conversion (set ADST)
, R1
, R2
, R3
, R4
, @ADCSR ; Clear ADST
, @ADCSR ; Clear ADF
) includes t
D
and t
; Read ADDRA
; Read ADDRB
; Read ADDRC
; Read ADDRD
220
SPL
. The purpose of t
D
D
is variable. The total
is to synchronize the
SPL
.
The actual A/D