HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 343

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

PCCSR—Parallel Communication Control/Status Register
Initial value
Read/Write
0 H8/300 CPU has read PCDR14 while MWMF = "1."
1 Master CPU has written data in PCDR14.
0 Master write end interrupt (MWEI) is disabled.
1 Master write end interrupt (MWEI) is enabled.
Bit
Master Write End Flag
H8/300 CPU: R
Master CPU: R
0 Master CPU has read PCDR14.
1 H8/300 CPU has written data in PCDR14.
MWEF
Enable Master Write Interrupt
7
0
EMWI
R/W
R
6
0
0 RDY output is disabled. Remains in high-impedance state.
1 RDY output is enabled.
Enable Acknowledge and Request
0 Not master write mode. Cleared when H8/300 CPU reads PCDR0.
1 Master write mode. Set if the master CPU writes to PCDR0 while
SWMF = “0.”
Slave Write End Flag
SWEF
0 Cleared when H8/300 CPU reads or writes
1 Set when master CPU reads PCDR0.
R
R
5
0
PCDR0, or master CPU writes to PCDR0.
0 Not slave write mode. Cleared when master CPU reads
1 Slave write mode. Set if H8/300 CPU writes to PCDR0
EAKAR MREF
while MWMF = “0.”
PCDR0.
0 Master read end interrupt (MREI) is disabled.
1 Master read end interrupt (MREI) is enabled.
R/W
R/W
4
0
335
R
Master Read End Flag
R
3
0
Enable Master Read Interrupt
EMRI
R/W
R
2
0
H’FFF0
Master Write Mode Flag
MWMF SWMF
Slave Write Mode Flag
R
R
1
0
DPRAM
R
R
0
0