HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 10

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

4.2
4.3
4.4
4.5
4.6
4.7
4.8
Section 5 Interrupt Controller (INTC)
5.1
5.2
5.3
4.1.1
4.1.2
4.1.3
Reset .................................................................................................................................. 51
4.2.1
4.2.2
4.2.3
Address Errors ................................................................................................................... 52
4.3.1
4.3.2
Interrupts............................................................................................................................ 54
4.4.1
4.4.2
4.4.3
Instruction Exceptions ....................................................................................................... 55
4.5.1
4.5.2
4.5.3
4.5.4
Cases in Which Exceptions Are Not Accepted .................................................................
4.6.1
4.6.2
Stack Status after Exception Processing............................................................................ 58
Notes.................................................................................................................................. 59
4.8.1
4.8.2
4.8.3
Overview............................................................................................................................ 61
5.1.1
5.1.2
5.1.3
5.1.4
Interrupt Sources................................................................................................................ 63
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Register Descriptions......................................................................................................... 68
5.3.1
Exception Processing Types and Priorities .......................................................... 47
Exception Processing Operation .......................................................................... 49
Exception Process Vector Table .......................................................................... 49
Reset Types .......................................................................................................... 51
Power-On Reset.................................................................................................... 51
Manual Reset........................................................................................................ 52
Address Error Sources.......................................................................................... 52
Address Error Exception Processing.................................................................... 53
Interrupt Sources .................................................................................................. 54
Interrupt Priority Rankings................................................................................... 54
Interrupt Exception Processing ............................................................................ 55
Types of Instruction Exceptions........................................................................... 55
Trap Instruction .................................................................................................... 55
Illegal Slot Instruction .......................................................................................... 56
General Illegal Instructions .................................................................................. 56
Immediately after Delayed Branch Instructions...................................................
Immediately after Interrupt-Disabling Instructions.............................................. 57
Value of the Stack Pointer (SP)............................................................................ 59
Value of the Vector Base Register (VBR) ........................................................... 59
Address Errors that Are Caused by Stacking During Address Error
Exception Processing............................................................................................ 59
Features ................................................................................................................ 61
Block Diagram...................................................................................................... 61
Pin Configuration ................................................................................................. 63
Registers ............................................................................................................... 63
NMI Interrupts...................................................................................................... 64
User Break Interrupt ............................................................................................. 64
IRQ Interrupts ...................................................................................................... 64
On-Chip Interrupts................................................................................................ 64
Interrupt Exception Vectors and Priority Rankings ............................................. 65
Interrupt Priority Registers A–E (IPRA–IPRE) ................................................... 68
........................................................................... 61
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