HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 251

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

Bit 2:
TPSC2
0
1
10.2.10 Timer I/O Control Register (TIOR)
The timer I/O control register (TIOR) is an eight-bit read/write register that selects the output
compare or input capture function for the general registers GRA and GRB. It also selects the
function of the TIOCA and TIOCB pins. If output compare is selected, the TIOR also selects the
output settings. If input capture is selected, the TIOR also select the input capture edges. TIOR is
initialized to H'88 or H'08 on a reset or standby mode. Each ITU channel has one TIOR (table
10.8).
Table 10.8 Timer I/O Control Register (TIOR)
Channel
0
1
2
3
4
Note: Undefined
•
Bit 7 (reserved): Bit 7 is read as undefined. The write value should be 0 or 1.
Initial value:
Bit 1:
TPSC1
0
1
0
1
Bit name:
Abbre-
viation
TIOR0
TIOR1
TIOR2
TIOR3
TIOR4
R/W:
Bit:
Bit 0:
TPSC0 Counter Clock (and cycle when
0
1
0
1
0
1
0
1
Function
The TIOR controls the GRs. Some functions vary during PWM. When
channels 3 and 4 are set for complementary PWM mode/reset-synchronized
PWM mode, TIOR3 and TIOR4 settings are not valid.
—
—
7
*
Internal clock
Internal clock /2
Internal clock /4
Internal clock /8
External clock A (TCLKA)
External clock B (TCLKB)
External clock C (TCLKC)
External clock D (TCLKD)
IOB2
R/W
6
0
IOB1
R/W
(initial value)
5
0
IOB0
R/W
4
0
—
—
3
1
= 10 MHz)
IOA2
R/W
2
0
IOA1
R/W
1
0
HITACHI 237
IOA0
R/W
0
0