HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 270

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HD6417021

Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
10.4.3
In the synchronizing mode, two or more timer counters can be rewritten simultaneously
(synchronized preset). Multiple timer counters can also be cleared simultaneously using TCR
settings (synchronized clear). The synchronizing mode can increase the general registers for a
single time base. All five channels can be set for synchronous operation.
Procedure for Selecting the Synchronizing Mode (figure 10.26):
1. Set 1 in the SYNC bit of the timer synchro register (TSNC) to use the channels in the
2. When a value is written in the TCNT in any of the synchronized channels, the same value is
3. Set the counter to clear with compare match/input capture using bits CCLR1 and CCLR0 in the
4. Set the counter clear source to synchronized clear using the CCLR1 and CCLR0 bits.
5. Set the STR bits in the TSTR to 1 to start counting in the TCNT.
256 HITACHI
synchronizing mode.
simultaneously written in the TCNT in the other channels.
TCR.
Set synchronizing mode
Synchronizing preset
Select synchronizing
Synchronized preset
Synchronizing Mode
Set TCNT
mode
Figure 10.26 Procedure for Selecting the Synchronizing Mode
(2)
(1)
Synchronized clear
generated clear
Select counter
Start counting
Counter clear
Channel that
clear source
source?
Yes
No
(3)
(5)
Synchronized clear
Select counter
Start counting
clear source
(4)
(5)

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