HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 340

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

When a compare match B occurs before the compare match A, the 0 data transfer can be
performed before the 1 data transfer, so a non-overlapping waveform can be output. In such cases,
be sure not to change the NDR contents until the compare match A after the compare match B
occurs (non-overlap period). This can be ensured by writing the next data to the NDR using the
IMIA interrupt service routine. The DMAC can also be started up using an IMIA interrupt.
However, these write operations should be performed prior to the next compare match B. The
timing is shown in figure 11.10.
326 HITACHI
Compare
Compare
match A
match B
NDR
DR
Figure 11.10 Non-Overlap Operation and NDR Write Timing
disable period
0 output
NDR write
0/1 output
NDR write
NDR write period
disable period
0 output
NDR write
0/1 output
NDR write
NDR write period