HD6432646 Hitachi, HD6432646 Datasheet - Page 65
HD6432646
Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432646.pdf
(1155 pages)
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Instruction Set: All instructions and addressing modes can be used. Only the lower 16 bits of
effective addresses (EA) are valid.
Exception Vector Table and Memory Indirect Branch Addresses: In normal mode the top area
starting at H'0000 is allocated to the exception vector table. One branch address is stored per 16
bits (figure 2-2). The exception vector table differs depending on the microcontroller. For details
of the exception vector table, see section 4, Exception Handling.
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address included in the instruction code to specify a memory operand that
contains a branch address. In normal mode the operand is a 16-bit word operand, providing a 16-
bit branch address. Branch addresses can be stored in the top area from H'0000 to H'00FF. Note
that this area is also used for the exception vector table.
H'0000
H'0001
H'0002
H'0003
H'0004
H'0005
H'0006
H'0007
H'0008
H'0009
H'000A
H'000B
Figure 2-2 Exception Vector Table (Normal Mode)
(Reserved for system use)
Reset exception vector
Exception vector 1
Exception vector 2
Exception
vector table
31
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