HD643303x Hitachi, HD643303x Datasheet - Page 206

no-image

HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
Bit 2—Master Enable TIOCB
Bit 2
EB4
0
1
Bit 1—Master Enable TIOCA
Bit 1
EA4
0
1
Bit 0—Master Enable TIOCA
Bit 0
EA3
0
1
TIOCB
TIOCA
TFCR settings
TIOCA
TFCR settings
Description
a generic input/output pin).
If XTGD = 0, EB4 is cleared to 0 when input capture A occurs in channel 1.
TIOCB
Description
operates as a generic input/output pin).
If XTGD = 0, EA4 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
Description
operates as a generic input/output pin).
If XTGD = 0, EA3 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
4
4
4
4
3
3
output is disabled regardless of TIOR4 and TFCR settings (TIOCB
is enabled for output according to TIOR4 and TFCR settings
output is disabled regardless of TIOR4, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR4, TMDR, and
output is disabled regardless of TIOR3, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR3, TMDR, and
4
4
3
(EB4): Enables or disables ITU output at pin TIOCB
(EA4): Enables or disables ITU output at pin TIOCA
(EA3): Enables or disables ITU output at pin TIOCA
191
4
(Initial value)
(Initial value)
(Initial value)
operates as
4
4
3
.
.
.
4
3

Related parts for HD643303x