HD643303x Hitachi, HD643303x Datasheet - Page 242

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HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
Sample Setup Procedure for Reset-Synchronized PWM Mode: Figure 8-31 shows a sample
procedure for setting up reset-synchronized PWM mode.
Figure 8-31 Setup Procedure for Reset-Synchronized PWM Mode (Example)
Reset-synchronized PWM mode
Reset-synchronized PWM mode
Select counter clear source
Select reset-synchronized
Set general registers
Select counter clock
Stop counter
Start counter
PWM mode
Set TCNT
1
2
3
4
5
6
7
227
1. Clear the STR3 bit in TSTR to 0 to
2. Set bits TPSC2 to TPSC0 in TCR to
3. Set bits CCLR1 and CCLR0 in TCR3
4. Set bits CMD1 and CMD0 in TFCR to
5. Preset TCNT3 to H'0000. TCNT4
6. GRA3 is the waveform period register.
7. Set the STR3 bit in TSTR to 1 to start
halt TCNT3. Reset-synchronized
PWM mode must be set up while
TCNT3 is halted.
select the counter clock source for
channel 3. If an external clock source
is selected, select the external clock
edge(s) with bits CKEG1 and CKEG0
in TCR.
to select GRA3 compare match as
the counter clear source.
select reset-synchronized PWM mode.
TIOCA3, TIOCB3, TIOCA4, TIOCB4,
TOCXA4, and TOCXB4 automatically
become PWM output pins.
need not be preset.
Set the waveform period value in
GRA3. Set transition times of the
PWM output waveforms in GRB3,
GRA4, and GRB4. Set times within
the compare match range of TCNT3.
X
TCNT3.
GRA3 (X: setting value)

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