HD643303x Hitachi, HD643303x Datasheet - Page 280

• Manufacturer Part Number: HD643303x
• Description: Hitachi Microcomputer
• Manufacturer: Hitachi

Table 8-11 (b) ITU Operating Modes (Channel 1)
Operating Mode
Synchronous preset
PWM mode
Output compare A
Output compare B
Input capture A
Input capture B
Counter By compare
clearing match/input
Legend:
Notes: 1. The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
2. Valid only when channels 3 and 4 are operating in complementary PWM mode or reset-synchronized PWM mode.
o
capture A
By compare
match/input
capture B
Syn-
chronous
clear
Setting available (valid). — Setting does not affect this mode.
TSNC
Synchro-
nization
SYNC1 = 1 —
o
o
o
o
o
o
o
SYNC1 = 1 —
MDF
—
—
—
—
—
—
—
FDIR PWM
—
—
—
—
—
—
—
—
—
TMDR
o
PWM1 = 1 —
PWM1 = 0 —
o
PWM1 = 0 —
PWM1 = 0 —
o
o
o
Comple- Synchro-
mentary nized
PWM
—
—
—
—
—
Reset-
PWM
—
—
—
—
—
—
—
—
—
TFCR
265
Register Settings
Buffer-
ing
—
—
—
—
—
—
—
—
—
XTGD Select
—
—
—
—
o
—
—
—
—
*2
TOCR
Output
Level
—
—
—
—
—
—
—
—
—
TOER
Master
Enable IOA
—
—
—
—
—
—
—
—
—
o
—
IOA2 = 0
Other bits
unrestricted
o
IOA2 = 1
Other bits
unrestricted
o
o
o
o
TIOR1
IOB
o
o
o
IOB2 = 0
Other bits
unrestricted
o
IOB2 = 1
Other bits
unrestricted
o
o
o
*1
Clear
Select
o
o
o
o
o
o
CCLR1 = 0
CCLR0 = 1
CCLR1 = 1
CCLR0 = 0
CCLR1 = 1
CCLR0 = 1
TCR1
Clock
Select
o
o
o
o
o
o
o
o
o