HD643303x Hitachi, HD643303x Datasheet - Page 305
HD643303x
Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD643303X.pdf
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9.3.4 Non-Overlapping TPC Output
Sample Setup Procedure for Non-Overlapping TPC Output: Figure 9-6 shows a sample
procedure for setting up non-overlapping TPC output.
ITU setup
Port and
TPC setup
ITU setup
Figure 9-6 Setup Procedure for Non-Overlapping TPC Output (Example)
Select non-overlapping groups
Select TPC transfer trigger
Select counting operation
Set next TPC output data
Set next TPC output data
Select interrupt requests
Set initial output data
Enable TPC transfer
Select GR functions
Compare match A?
Set up TPC output
Non-overlapping
Set GR values
Start counter
TPC output
Yes
No
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Set TIOR to make GRA and GRB output
compare registers (with output inhibited).
Set the TPC output trigger period in GRB
and the non-overlap margin in GRA.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the counter
clear source with bits CCLR1 and CCLR0.
Enable the IMFA interrupt in TIER.
Set the initial output values in the DR bits
of the input/output port pins to be used for
TPC output.
Set the DDR bits of the input/output port pins
to be used for TPC output to 1.
Set the NDER bits of the pins to be used for
TPC output to 1.
In TPCR, select the ITU compare match
event to be used as the TPC output trigger.
In TPMR, select the groups that will operate
in non-overlap mode.
Set the next TPC output values in the NDR
bits.
Set the STR bit to 1 in TSTR to start the timer
counter.
At each IMFA interrupt, write the next output
value in the NDR bits.
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