HD643303x Hitachi, HD643303x Datasheet - Page 314

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HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
10.2.2 Timer Control/Status Register (TCSR)
TCSR is an 8-bit readable and writable
and clock source.
Bits 7 to 5 are initialized to 0 by a reset and in standby mode. Bits 2 to 0 are initialized to 0 by a
reset. In software standby mode bits 2 to 0 are not initialized, but retain their previous values.
Notes: 1. TCSR is write-protected by a password. For details see section 10.2.4, Notes on
Bit
Initial value
Read/Write
2. Only 0 can be written, to clear the flag.
Register Access.
R/(W)
Overflow flag
Status flag indicating overflow
OVF
7
0
*2
WT/IT
Timer mode select
Selects the mode
R/W
6
0
*1
Timer enable
TME
Selects whether TCNT runs or halts
R/W
5
0
register. Its functions include selecting the timer mode
299
4
1
Reserved bits
3
1
CKS2
R/W
2
0
Clock select
These bits select the
TCNT clock source
CKS1
R/W
1
0
CKS0
R/W
0
0

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