HD643303x Hitachi, HD643303x Datasheet - Page 324

• Manufacturer Part Number: HD643303x
• Description: Hitachi Microcomputer
• Manufacturer: Hitachi

10.4 Interrupts
During interval timer operation, an overflow generates an interval timer interrupt (WOVI). The
interval timer interrupt is requested whenever the OVF bit is set to 1 in TCSR.
10.5 Usage Notes
Contention between TCNT Write and Increment: If a timer counter clock pulse is generated
during the T
incremented. See figure 10-8.
Changing CKS2 to CKS0 Values: Halt TCNT by clearing the TME bit to 0 in TCSR before
changing the values of bits CKS2 to CKS0.
3
ø
TCNT
Internal write
signal
TCNT input
clock
TCNT
state of a write cycle to TCNT, the write takes priority and the timer count is not
Figure 10-8 Contention between TCNT Write and Increment
Write cycle: CPU writes to TCNT
T
1
N
T
309
2
T
3
M
Counter write data