HD643303x Hitachi, HD643303x Datasheet - Page 500

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HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
TMDR—Timer Mode Register
Bit
Initial value
Read/Write
Phase counting mode flag
0 Channel 2 operates normally
1 Channel 2 operates in phase counting mode
Flag direction
7
1
0 OVF is set to 1 in TSR2 when TCNT2 overflows or underflows
1 OVF is set to 1 in TSR2 when TCNT2 overflows
PWM mode 4
0 Channel 4 operates normally
1 Channel 4 operates in PWM mode
MDF
R/W
6
0
PWM mode 3
0 Channel 3 operates normally
1 Channel 3 operates in PWM mode
FDIR
R/W
PWM mode 2
5
0
0 Channel 2 operates normally
1 Channel 2 operates in PWM mode
485
PWM mode 1
PWM4
0 Channel 1 operates normally
1 Channel 1 operates in PWM mode
R/W
4
0
PWM mode 0
0 Channel 0 operates normally
1 Channel 0 operates in PWM mode
PWM3
R/W
3
0
H'62
PWM2
R/W
2
0
ITU (all channels)
PWM1
R/W
1
0
PWM0
R/W
0
0

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