HD643303x Hitachi, HD643303x Datasheet - Page 568

• Manufacturer Part Number: HD643303x
• Description: Hitachi Microcomputer
• Manufacturer: Hitachi

D.2 Pin States at Reset
Reset in T
T
the input state. AS, RD, and WR go high, and the data bus goes to the high-impedance state. The
address bus is initialized to the low output level 0.5 state after the low level of RES is sampled.
Sampling of RES takes place at the fall of the system clock (ø).
1
ø
RES
Internal
reset signal
Address bus
(mode 1)
AS (mode 1)
RD (read access)
(mode 1)
WR (write access)
(mode 1)
Data bus
(write access)
(mode 1)
I/O port
(modes 1 to 3)
state of an external memory access cycle. As soon as RES goes low, all ports are initialized to
1
State: Figure D-1 is a timing diagram for the case in which RES goes low during the
Figure D-1 Reset during Memory Access (Reset during T
High
High
High
Access to external address
T
1
552
T
2
T
3
H'000000
1
High impedance
High impedance
State)