HD643303x Hitachi, HD643303x Datasheet - Page 93

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HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'0B by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
SSBY
Software standby
R/W
7
0
STS2
R/W
6
0
Standby timer
select 2 to 0
STS1
R/W
5
0
78
STS0
R/W
4
0
User bit enable
Selects whether to use CCR bit 6
as a user bit or interrupt mask bit
R/W
UE
3
1
NMI edge select
Selects the NMI input edge
NMIEG
R/W
2
0
Reserved bit
R/W
1
1
RAM enable
RAME
R/W
0
1

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