HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 325

• Manufacturer Part Number: HD6433044
• Description: (HD64 Series) Hitachi Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Bit 0—PWM Mode 0 (PWM0): Selects whether channel 0 operates normally or in PWM mode.
Bit 0
PWM0
0
1
When bit PWM0 is set to 1 to select PWM mode, pin TIOCA
output goes to 1 at compare match with GRA0, and to 0 at compare match with GRB0.
10.2.4 Timer Function Control Register (TFCR)
TFCR is an 8-bit readable/writable register that selects complementary PWM mode, reset-
synchronized PWM mode, and buffering for channels 3 and 4.
TFCR is initialized to H'C0 by a reset and in standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bit
Initial value
Read/Write
Description
Channel 0 operates normally
Channel 0 operates in PWM mode
Reserved bits
—
—
7
1
—
—
6
1
Combination mode 1/0
These bits select complementary
PWM mode or reset-synchronized
PWM mode for channels 3 and 4
CMD1
R/W
5
0
313
CMD0
R/W
4
0
Buffer mode B4 and A4
These bits select buffering of
general registers (GRB4 and
GRA4) by buffer registers
(BRB4 and BRA4) in channel 4
BFB4
R/W
3
0
0
becomes a PWM output pin. The
BFA4
R/W
Buffer mode B3 and A3
These bits select buffering
of general registers (GRB3
and GRA3) by buffer
registers (BRB3 and BRA3)
in channel 3
2
0
BFB3
R/W
1
0
(Initial value)
BFA3
R/W
0
0