HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 329

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HD6433044

Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Bit 2—Master Enable TIOCB4 (EB4): Enables or disables ITU output at pin TIOCB
Bit 2
EB4
0
1
Bit 1—Master Enable TIOCA4 (EA4): Enables or disables ITU output at pin TIOCA
Bit 1
EA4
0
1
Bit 0—Master Enable TIOCA3 (EA3): Enables or disables ITU output at pin TIOCA
Bit 0
EA3
0
1
Description
TIOCB
a generic input/output pin).
If XTGD = 0, EB4 is cleared to 0 when input capture A occurs in channel 1.
TIOCB
Description
TIOCA
operates as a generic input/output pin).
If XTGD = 0, EA4 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
TFCR settings
Description
TIOCA
operates as a generic input/output pin).
If XTGD = 0, EA3 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
TFCR settings
4
4
4
4
3
3
output is disabled regardless of TIOR4 and TFCR settings (TIOCB
is enabled for output according to TIOR4 and TFCR settings
output is disabled regardless of TIOR4, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR4, TMDR, and
output is disabled regardless of TIOR3, TMDR, and TFCR settings (TIOCA
is enabled for output according to TIOR3, TMDR, and
317
4
(Initial value)
(Initial value)
(Initial value)
operates as
4
4
3
.
.
.
4
3

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