HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 415

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HD6433044

Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet

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11.2.6 Next Data Register B (NDRB)
NDRB is an 8-bit readable/writable register that stores the next output data for TPC output groups
3 and 2 (pins TP
TPCR occurs, NDRB contents are transferred to the corresponding bits in PBDR. The address of
NDRB differs depending on whether TPC output groups 2 and 3 have the same output trigger or
different output triggers.
NDRB is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Same Trigger for TPC Output Groups 2 and 3: If TPC output groups 2 and 3 are triggered by
the same compare match event, the NDRB address is H'FFA4. The upper 4 bits belong to group 3
and the lower 4 bits to group 2. Address H'FFA6 consists entirely of reserved bits that cannot be
modified and are always read as 1.
Address H'FFA4
Address H'FFA6
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
15
NDR15
NDR15
to TP
R/W
R/W
7
7
0
0
7
1
Next data 15 to 12
These bits store the next output
data for TPC output group 3
Next data 15 to 12
These bits store the next output
data for TPC output group 3
8
). During TPC output, when an ITU compare match event specified in
NDR14
NDR14
R/W
R/W
6
6
0
0
6
1
NDR13
NDR13
R/W
R/W
5
5
0
0
5
1
403
NDR12
NDR12
R/W
Reserved bits
R/W
4
4
0
0
4
1
NDR11
NDR11
R/W
R/W
3
3
0
0
3
1
Next data 11 to 8
Next data 11 to 8
These bits store the next output
These bits store the next output
data for TPC output group 2
data for TPC output group 2
NDR10
NDR10
R/W
R/W
2
2
0
0
2
1
NDR9
NDR9
R/W
R/W
1
0
1
0
1
1
NDR8
NDR8
R/W
R/W
0
0
0
0
0
1

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