HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 494

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HD6433044

Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Transmitting and Receiving Data
SCI Initialization (Synchronous Mode): Before transmitting or receiving, clear the TE and
RE bits to 0 in SCR, then initialize the SCI as follows.
When changing the communication mode or format, always clear the TE and RE bits to 0 before
following the procedure given below. Clearing the TE bit to 0 sets the TDRE flag to 1 and
initializes TSR. Clearing the RE bit to 0, however, does not initialize the RDRF, PER, FER, and
ORE flags and RDR, which retain their previous contents.
Figure 13-15 is a sample flowchart for initializing the SCI.
CKE1, and CKE0 bits in SCR
Start transmitting or receiving
Set RIE, TIE, TEIE, MPIE,
Set TE or RE to 1 in SCR
(leaving TE and RE bits
Set RIE, TIE, TEIE, and
MPIE bits as necessary
Select communication
Start of initialization
Clear TE and RE
Set value in BRR
bits to 0 in SCR
format in SMR
cleared to 0)
1 bit interval
elapsed?
Yes
Figure 13-15 Sample Flowchart for SCI Initialization
Wait
No
1
2
3
4
1.
2.
3.
4.
Select the clock source in SCR. Clear the RIE, TIE, TEIE,
MPIE, TE, and RE bits to 0.
Select the communication format in SMR.
Write the value corresponding to the bit rate in BRR.
This step is not necessary when an external clock is used.
Wait for at least the interval required to transmit or receive
one bit, then set the TE or RE bit to 1 in SCR. Also set
the RIE, TIE, TEIE, and MPIE bits as necessary.
Setting the TE or RE bit enables the SCI to use the
TxD or RxD pin.
483

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