HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 7

• Manufacturer Part Number: HD6433044
• Description: (HD64 Series) Hitachi Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

8.4
8.5
8.6
Section 9
9.1
9.2
9.3
9.4
9.5
8.3.2
8.3.3
8.3.4
Operation ........................................................................................................................ 205
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
8.4.7
8.4.8
8.4.9
8.4.10
8.4.11
8.4.12
8.4.13
8.4.14
Interrupts......................................................................................................................... 237
Usage Notes .................................................................................................................... 238
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.6.7
8.6.8
Overview......................................................................................................................... 243
Port 1............................................................................................................................... 246
9.2.1
9.2.2
Port 2............................................................................................................................... 249
9.3.1
9.3.2
Port 3............................................................................................................................... 253
9.4.1
9.4.2
Port 4............................................................................................................................... 255
I/O Address Registers (IOAR)........................................................................ 196
Execute Transfer Count Registers (ETCR)..................................................... 197
Data Transfer Control Registers (DTCR) ....................................................... 199
Overview......................................................................................................... 205
I/O Mode......................................................................................................... 207
Idle Mode........................................................................................................ 209
Repeat Mode................................................................................................... 212
Normal Mode.................................................................................................. 215
Block Transfer Mode ...................................................................................... 218
DMAC Activation........................................................................................... 223
DMAC Bus Cycle ........................................................................................... 225
Multiple-Channel Operation........................................................................... 231
External Bus Requests, Refresh Controller, and DMAC................................ 232
NMI Interrupts and DMAC ............................................................................ 233
Aborting a DMA Transfer .............................................................................. 234
Exiting Full Address Mode............................................................................. 235
DMAC States in Reset State, Standby Modes, and Sleep Mode .................... 236
Note on Word Data Transfer........................................................................... 238
DMAC Self-Access ........................................................................................ 238
Longword Access to Memory Address Registers........................................... 238
Note on Full Address Mode Setup.................................................................. 238
Note on Activating DMAC by Internal Interrupts .......................................... 239
NMI Interrupts and Block Transfer Mode ...................................................... 240
Memory and I/O Address Register Values ..................................................... 240
Bus Cycle when Transfer is Aborted .............................................................. 241
I/O Ports
Overview......................................................................................................... 246
Register Descriptions...................................................................................... 247
Overview......................................................................................................... 249
Register Descriptions...................................................................................... 250
Overview......................................................................................................... 253
Register Descriptions...................................................................................... 253
....................................................................................................... 243