HD6435348R Hitachi Semiconductor, HD6435348R Datasheet - Page 432
HD6435348R
Manufacturer Part Number
HD6435348R
Description
Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6435348R.pdf
(487 pages)
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ADCSR—A/D Control/Status Register
Bit
Initial value
Read/Write
* Only writing of 0 to clear the flag is enabled.
R/(W)*
ADF
7
0
A/D End Flag
0 Cleared from 1 to 0 when:
1 Set to 1 at the following times:
ADIE
1. The chip is reset or enters a standby mode.
2. CPU reads ADF = 1, then writes 0 in ADF.
3. DTC is served by ADI.
1. Single mode: at the completion of A/D conversion.
2. Scan mode: when all selected channels have been converted.
R/W
6
0
A/D Interrupt Enable
0 The A/D interrupt request (ADI) is disabled.
1 The A/D interrupt request (ADI) is enabled.
ADST
R/W
5
0
A/D Start
0 A/D conversion is halted.
1 1. Single mode: One A/D conversion is performed,
SCAN
422
R/W
2. Scan mode: A/D conversion starts and continues
4
0
then this bit is automatically cleared to 0.
cyclically on all selected channels until 0 is
written in this bit.
Scan Mode
0 Single mode
1 Scan mode
CH2 CH1 CH0 Single Mode
0
1
Clock Select
0 Conversion time = 274 states
1 Conversion time = 138 states
H'FEE8
CKS
R/W
3
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CH2
R/W
2
0
Channel Select
AN
AN
AN
AN
AN
AN
AN
AN
0
1
2
3
4
5
6
7
CH1
R/W
1
0
AN
AN
AN
AN
Scan Mode
AN
AN
CH0
0
0
4
4
R/W
AN
AN
A/D
0
4
to AN
to AN
to AN
to AN
0
0
, AN
, AN
0
4
1
5
2
3
6
7
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