24LC024 MicrochipTechnology, 24LC024 Datasheet

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24LC024

Manufacturer Part Number
24LC024
Description
2K2.5VI2CSerialEEPROM
Manufacturer
MicrochipTechnology
Datasheet

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FEATURES
• Single supply with operation from 2.5 to 5.5V
• Low power CMOS technology
• Organized as a single block of 128 bytes (256 x 8)
• Hardware write protection for entire array
• 2-wire serial interface bus, I
• 100kHz and 400kHz compatibility
• Page-write buffer for up to 16 bytes
• Self-timed write cycle (including auto-erase)
• 3.5 ms typical write cycle time for page write
• Address lines allow up to eight devices on bus
• 10,000,000 erase/write cycles guaranteed
• ESD protection > 4,000V
• Data retention > 200 years
• 8-pin PDIP, SOIC or TSSOP packages
• Available for extended temperature ranges
DESCRIPTION
The Microchip Technology Inc. 24LC024/24LC025 is a
2K bit Serial Electrically Erasable PROM with a voltage
range of 2.5V to 5.5V. The device is organized as a
single block of 256 x 8-bit memory with a 2-wire serial
interface. Low current design permits operation with
typical standby and active currents of only 10 A and 1
mA respectively. The device has a page-write capability
for up to 16 bytes of data. Functional address lines
allow the connection of up to eight 24LC024/24LC025
devices on the same bus for up to 16K bits of contigu-
ous EEPROM memory. The device is available in the
standard 8-pin PDIP, 8-pin SOIC (150 mil), and TSSOP
packages.
M
- 1 mA active current typical
- 10 A standby current typical at 5.5V
(24LC024)
- Commercial (C):
- Industrial (I):
1997 Microchip Technology Inc.
-40 C to
2K 2.5V I
0 C to
2
C compatible
+70 C
+85 C
24LC024/24LC025
2
C
Preliminary
Serial EEPROM
PACKAGE TYPES
BLOCK DIAGRAM
SDA SCL
PDIP/SOIC
TSSOP
A0 A1 A2
Control
Logic
V
I/O
V
CC
SS
*WP pin available only on 24LC024. This
pin has no internal connection on 24LC025
V
*WP pin available only on 24LC024. This
pin has no internal connection on 24LC025
Vss
A0
A1
A2
SS
A0
A1
A2
Memory
Control
WP*
Logic
1
2
3
4
1
2
3
4
XDEC
8
7
6
5
8
7
6
5
SENSE AMP
R/W CONTROL
HV Generator
Write Protect
DS21210A-page 1
Circuitry
EEPROM
Vcc
WP*
SCL
SDA
YDEC
Array
V
WP*
SCL
SDA
CC

Related parts for 24LC024

24LC024 Summary of contents

Page 1

... A and 1 mA respectively. The device has a page-write capability for bytes of data. Functional address lines allow the connection eight 24LC024/24LC025 devices on the same bus for up to 16K bits of contigu- ous EEPROM memory. The device is available in the standard 8-pin PDIP, 8-pin SOIC (150 mil), and TSSOP packages ...

Page 2

... DS21210A-page 2 TABLE 1-1: Name Function V Ground SS SDA Serial Data +1.0V SCL Serial Clock CC V +2.5V to 5.5V Power Supply CC A0, A1, A2 Chip Selects WP Hardware Write Protect (24LC024 internal connection V = +2.5V to +5.5V CC Commercial (C): Tamb = +70 C Industrial (I): Tamb = - +85 C Symbol Min. Max. Units V 0 ...

Page 3

... BUS TIMING DATA T F SCL STA T LOW SDA STA SDA OUT 1997 Microchip Technology Inc. 24LC024/24LC025 Vcc = 2.5V to 5.5V Commercial (C): Industrial (I): Vcc = 2.5V - 5.5V Vcc = 4.5V - 5.5V STD MODE FAST MODE Min. Max. Min. Max. — 100 — 400 4000 — 600 — 4700 — ...

Page 4

... If tied to Vcc, the hardware write protection enabled. If the WP pin is tied to Vss the hardware write protection is disabled. Note that the WP pin is available only on the 24LC024. This pin is not internally connected on the 24LC025. 2.5 Noise Protection The 24LC024/24LC025 employs a V detector circuit which disables the internal erase/write logic if the V is below 1 ...

Page 5

... The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24LC024/24LC025 does not generate any acknowledge bits if an internal pro- gramming cycle is in progress. The device that acknowledges has to pull down the ...

Page 6

... SDA bus checking the control byte being transmitted. Upon receiving a 1010 code and appropriate chip select bits, the slave device out- puts an acknowledge signal on the SDA line. Depend- ing on the state of the R/W bit, the 24LC024/24LC025 will select a read or write operation. DS21210A-page 6 FIGURE 5-1: ...

Page 7

... The write cycle time must be observed even if the write protection is enabled. 6.3 WRITE PROTECTION The WP pin (available on 24LC024 only) must be tied tied protected ...

Page 8

... ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the stop condition for a write com- mand has been issued from the master, the device ini- tiates the internally timed write cycle ...

Page 9

... Then the master issues the control byte again but with the R/W bit set to a one. The 24LC024/ 24LC025 will then issue an acknowledge and transmits the eight bit data word. The master will not acknowl- ...

Page 10

... NOTES: DS21210A-page 10 Preliminary 1997 Microchip Technology Inc. ...

Page 11

... PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. 24LC024/24LC025 — /P Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. Your local Microchip sales offi ...

Page 12

W ORLDWIDE AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602-786-7200 Fax: 602-786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 ...

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