M58BW016BB ST Microelectronics, M58BW016BB Datasheet - Page 6

• Manufacturer Part Number: M58BW016BB
• Description: 16 Mbit 512Kb x32 / Boot Block / Burst 3V Supply Flash Memories
• Manufacturer: ST Microelectronics

M58BW016BT, M58BW016BB, M58BW016DT, M58BW016DB
SUMMARY DESCRIPTION
The M58BW016B/D is a 16Mbit non-volatile Flash
memory that can be erased electrically at the block
level and programmed in-system on a Double-
Word basis using a 2.7V to 3.6V V
circuit and a V
put and Output buffers. Optionally a 12V V
ply can be used to provide fast program and erase
for a limited time and number of program/erase cy-
cles.
The devices support Asynchronous (Latch Con-
trolled and Page Read) and Synchronous Bus op-
erations. The Synchronous Burst Read Interface
allows a high data transfer rate controlled by the
Burst Clock, K, signal. It is capable of bursting
fixed or unlimited lengths of data. The burst type,
latency and length are configurable and can be
easily adapted to a large variety of system clock
frequencies and microprocessors. All Writes are
Asynchronous. On power-up the memory defaults
to Read mode with an Asynchronous Bus.
The device has a boot block architecture with an
array of 8 parameter block of 64Kb each and 31
main blocks of 512Kb each. The parameter blocks
can be located at the top of the address space,
M58BW016BT, M58BW016DT or at the bottom,
M58BW016BB, M58BW016DB.
Program and Erase commands are written to the
Command Interface of the memory. An on-chip
Program/Erase Controller simplifies the process of
programming or erasing the memory by taking
care of all of the special operations that are re-
quired to update the memory contents. The end of
a Program or Erase operation can be detected and
any error conditions identified in the Status Regis-
6/63
DDQ
supply down to 2.4V for the In-
DD
supply for the
PP
sup-
ter. The command set required to control the
memory is consistent with JEDEC standards.
Erase can be suspended in order to perform either
Read or Program in any other block and then re-
sumed. Program can be suspended to Read data
in any other block and then resumed. Each block
can be programmed and erased over 100,000 cy-
cles.
All blocks are protected during power-up. The
M58BW016B features four different levels of block
protection to avoid unwanted program/erase oper-
ations. The WP pin offers an hardware protection
on two of the parameter blocks and all of the main
blocks. The Program and Erase commands can
be password protected by the Tuning Protection
command. All Program or Erase operations are
blocked when Reset, RP, is held low. The
M58BW016D offers the same protection features
with the exception of the Tuning Block Protection
which is disabled in the factory.
A Reset/Power-down mode is entered when the
RP input is Low. In this mode the power consump-
tion is lower than in the normal standby mode, the
device is write protected and both the Status and
the Burst Configuration Registers are cleared. A
recovery time is required when the RP input goes
High.
The memory is offered in PQFP80 (14 x 20mm)
and LBGA80 (1.0mm pitch) packages and it is
supplied with all the bits erased (set to ’1’).