AT45DB081 ATMEL Corporation, AT45DB081 Datasheet

no-image

AT45DB081

Manufacturer Part Number
AT45DB081
Description
8-Megabit 2.7-volt Only Serial DataFlash
Manufacturer
ATMEL Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB081-BRU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT45DB081-RC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT45DB081-RC
Quantity:
10
Part Number:
AT45DB081-TC
Manufacturer:
ATM
Quantity:
721
Part Number:
AT45DB081A-CC
Manufacturer:
TEMIC
Quantity:
2 351
Part Number:
AT45DB081A-RC
Manufacturer:
AT
Quantity:
20 000
Part Number:
AT45DB081B-CC
Manufacturer:
ATMEL
Quantity:
1 831
Part Number:
AT45DB081B-CC
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT45DB081B-CC-2.5
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT45DB081B-CI
Manufacturer:
ATMEL
Quantity:
2 100
Part Number:
AT45DB081B-CI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT45DB081B-CI-2.5
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT45DB081B-CNC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT45DB081B-CNU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT45DB081B-CNU
Quantity:
819
Part Number:
AT45DB081B-CU
Manufacturer:
ATMEL
Quantity:
1 200
Part Number:
AT45DB081B-RU
Quantity:
2 096
Features
Description
The AT45DB081 is a 2.7-volt only, serial interface Flash memory suitable for in-sys-
tem reprogramming. Its 8,650,752 bits of memory are organized as 4096 pages of
264-bytes each. In addition to the main memory, the AT45DB081 also contains two
data buffers of 264-bytes each. The buffers allow receiving of data while a page in the
main memory is being reprogrammed. Unlike conventional Flash memories that are
accessed randomly with multiple address lines and a parallel interface, the DataFlash
uses a serial interface to sequentially access its data. The simple serial interface facil-
itates hardware layout, increases system reliability, minimizes switching noise, and
Pin Configurations
Pin Name
CS
SCK
SI
SO
WP
RESET
RDY/BUSY
Single 2.7V - 3.6V Supply
Serial Interface Architecture
Page Program Operation
Two 264-Byte Data Buffers – Allows Receiving of Data while Reprogramming of
Internal Program and Control Timer
Fast Page Program Time – 7 ms Typical
120 s Typical Page to Buffer Transfer Time
Low Power Dissipation
10 MHz Max Clock Frequency
Hardware Data Protection Feature
Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
Non-Volatile Memory
– Single Cycle Reprogram (Erase and Program)
– 4096 Pages (264 Bytes/Page) Main Memory
– 4 mA Active Read Current Typical
– 2 A CMOS Standby Current Typical
GND
SCK
NC
NC
SO
NC
NC
NC
NC
NC
NC
NC
CS
SI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOIC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Function
Chip Select
Serial Clock
Serial Input
Serial Output
Hardware Page Write
Protect Pin
Chip Reset
Ready/Busy
VCC
NC
NC
WP
RESET
RDY/BUSY
NC
NC
NC
NC
NC
NC
NC
NC
RDY/BUSY
RESET
GND
VCC
SCK
WP
NC
NC
NC
NC
NC
NC
NC
SO
CS
SI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TSOP Top View
Type 1
(continued)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
8-Megabit
2.7-volt Only
Serial
DataFlash
AT45DB081
0870A-A–6/97
1

Related parts for AT45DB081

AT45DB081 Summary of contents

Page 1

... Commercial and Industrial Temperature Ranges Description The AT45DB081 is a 2.7-volt only, serial interface Flash memory suitable for in-sys- tem reprogramming. Its 8,650,752 bits of memory are organized as 4096 pages of 264-bytes each. In addition to the main memory, the AT45DB081 also contains two data buffers of 264-bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed ...

Page 2

... FLASH MEMORY ARRAY BUFFER 2 (264 BYTES) I/O INTERFACE SI address bits and 32 don’t care bits. In the AT45DB081, the first three address bits are reserved for larger density devices (see Notes on page 7), the next 12 address bits (PA11-PA0) specify the page address, and the next nine address bits (BA8-BA0) specify the starting byte address within the page. The 32 don’ ...

Page 3

... The 12 most significant address bits (PA11-PA0) select the page in the main memory where data written, and the next nine address bits (BFA8-BFA0) select the first byte in the buffer to be written. After all address bits are shifted in, the part will take data from the SI pin and store it in one of the data buffers ...

Page 4

... The device density is indicated using bits 5, 4, and 3 of the status register. For the AT45DB081, the three bits are 1, 0, and 0. The decimal value of these three binary bits does not equate to the device density; the three bits represent a ...

Page 5

... This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AT45DB081 - 2.7V to 3.6V 5 ...

Page 6

... XFR t Page Erase and Programming Time EP t Page Programming Time P Input Test Waveforms and Measurement Levels 2.4V AC DRIVING LEVELS 0.45V < (10 AT45DB081 6 Condition Min CS, RESET all IH inputs at CMOS levels MHz mA; OUT ...

Page 7

AC Waveforms Two different timing diagrams are shown below. Waveform 1 shows the SCK signal being low when CS makes a high- to-low transition, and Waveform 2 shows the SCK signal being high when CS makes a high-to-low transition. Both ...

Page 8

... Buffer Write CS SI CMD Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page Each transition represents 8 bits and 8 clock cycles AT45DB081 8 FLASH MEMORY ARRAY MAIN MEMORY PAGE PROGRAM THROUGH BUFFER 2 MAIN MEMORY PAGE PROGRAM THROUGH BUFFER 1 I/O INTERFACE ...

Page 9

... PAGE TO BUFFER 1 BUFFER 1 (264 BYTES) BUFFER 1 READ Main Memory Page Read CS SI CMD PA11-7 SO Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer Buffer Read Each transition represents 8 bits and 8 clock cycles FLASH MEMORY ARRAY ...

Page 10

... COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK 1 2 tSU HIGH-IMPEDANCE SO AT45DB081 HIGH-IMPEDANCE HIGH-IMPEDANCE COMMAND OPCODE ...

Page 11

... Detailed Bit-Level Read Timing – Inactive Clock Polarity High Main Memory Page Read CS SCK 1 2 tSU COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK tSU HIGH-IMPEDANCE ...

Page 12

... • • • X (64th bit) AT45DB081 12 Table 1 Main Memory Main Memory Page to Buffer 1 Page to Buffer 2 Page to Buffer 1 Transfer Transfer Opcode 53H 55H ...

Page 13

... Table 2 Buffer 2 to Main Main Main Memory Memory Memory Page Page Page Program Program Program without Through Through Built-In Buffer 1 Buffer 2 Erase Opcode 89H 82H 85H ...

Page 14

... A page can be written using either a Main Memory Page Program operation or a Buffer Write operation followed by a Buffer to Main Memory Page Program operation. 3. The algorithm above shows the programming of a single page. The algorithm will be repeated sequentially for each page within the entire array. AT45DB081 14 START provide address and data ...

Page 15

... MAIN MEMORY PAGE PROGRAM (82H, 85H) Notes preserve data integrity, each page of the DataFlash memory array must be updated/rewritten at least once within every 10,000 cumulative page erase/program operations Page Address Pointer must be maintained to indicate which page rewritten. The Auto Page Rewrite com- mand must use the address specified by the Page Address Pointer ...

Page 16

... Wide, Plastic Gull-Wing Small Outline Package (SOIC) 32T 32-Lead, Plastic Thin Small Outline Package (TSOP) AT45DB081 16 Ordering Code Package AT45DB081-RC 28R AT45DB081-TC 32T AT45DB081-RI 28R AT45DB081-TI 32T Package Type Operation Range Commercial ( Industrial (- ...

Related keywords