RD48F2000P0ZBQ0 Intel Corporation, RD48F2000P0ZBQ0 Datasheet - Page 40
RD48F2000P0ZBQ0
Manufacturer Part Number
RD48F2000P0ZBQ0
Description
Intel StrataFlash Embedded Memory
Manufacturer
Intel Corporation
Datasheet
1.RD48F2000P0ZBQ0.pdf
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1-Gbit P30 Family
Figure 20.
April 2005
40
Address [A]
Data [D/Q]
ADV# [V]
WAIT [T]
OE# [G]
CLK [C]
CE# [E]
R105
R105
Continuous Burst Read, showing an Output Delay Timing
Notes:
1.
2.
R301
R302
R303
R101
R102
R306
WAIT is driven per OE# assertion during synchronous array or non-array read, and can be configured to
assert either during or one data cycle before valid data.
At the end of Word Line; the delay incurred when a burst access crosses a 16-word boundary and the
starting address is not 4-word boundary aligned.
R106
R15
R2
R3
Intel StrataFlash
R7
Order Number: 306666, Revision: 001
R4
R307
R304
®
Embedded Memory (P30)
R312
R305
R305
R304
R305
R304
Datasheet
R304
R305
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