VIPEr100ASP STMicroelectronics, VIPEr100ASP Datasheet - Page 13

• Manufacturer Part Number: VIPEr100ASP
• Description: SMPS PRIMARY I.C.
• Manufacturer: STMicroelectronics

Figure 15: Behaviour of the high voltage current source at start-up
The start up current generator is switched off, and
the converter should normally provide the needed
current on the V
winding of the transformer, as shown on figure 15.
In case of abnormal condition where the auxiliary
winding is unable to provide the low voltage supply
current to the V
output of the converter), the external capacitor
discharges itself down to the low threshold voltage
V
to the inactive state where the internal circuits are
in standby mode and the start up current source is
activated. The converter enters a endless start up
cycle, with a start-up duty cycle defined by the
ratio of charging current towards discharging when
the VIPer100/100A tries to start. This ratio is fixed
by design to 2 to 15, which gives a 12% start up
duty cycle while the power dissipation at start up is
approximately 0.6 W, for a 230 Vrms input voltage.
This low value of start-up duty cycle prevents the
stress of the output rectifiers and of the
transformer when in short circuit.
The external capacitor C
be sized according to the time needed by the
converter to start up, when the device starts
switching. This time t
parameters, among which transformer design,
output
compensation network implemented on the COMP
pin. The following formula can be used for defining
the minimum capacitor needed:
C
DDoff
VDD
of the UVLO logic, and the device get back
VDDoff
VDDon
capacitors,
------------------------- -
V
I
DD
DDhy st
t
SS
VDD
DD
DD
pin (i.e. short circuit on the
soft
pin through the auxiliary
VDD
SS
start
depends on many
on the V
t
Auxiliary primary
feature
DD
winding
pin must
15 mA
C
2 mA
VDD
and
VDD
VIPer100
Start up duty cycle ~ 12%
where:
I
when switching. Refer to specified I
values.
t
device begins to switch. Worst case is generally at
full load.
V
logic. Refer to the minimum specified value.
Soft start feature can be implemented on the
COMP pin through a simple capacitor which will be
also used as the compensation network. In this
case, the regulation loop bandwidth is rather low,
because of the large value of this capacitor. In
case a large regulation loop bandwidth is
mandatory, the schematics of figure 16 can be
used. It mixes a high performance compensation
network together with a separate high value soft
start capacitor. Both soft start time and regulation
loop bandwidth can be adjusted separately.
If the device is intentionally shut down by putting
the COMP pin to ground, the device is also
performing start-up cycles, and the V
oscillating between V
This voltage can be used for supplying external
functions, provided that their consumption doesn’t
exceed 0.5mA. Figure 17 shows a typical
application of this function, with a latched shut
down. Once the "Shutdown" signal has been
activated, the device remains in the off state until
the input voltage is removed.
DD
SS
1 mA
UNDERVOLTAGE
LOCK OUT LOGIC
DDhyst
Ref.
is the start up time of the converter when the
is the consumption current on the V
15 mA
is the voltage hysteresis of the UVLO
3 mA
VIPer100/SP - VIPer100A/ASP
DDon
and V
DRAIN
SOURCE
DDoff
FC00100
DD1
DD
.
voltage is
and I
DD
13/23
DD
pin
2