XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 88
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
(262 pages)
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Clock Generator Module (CGM)
8.2 Introduction
Advance Information
88
8.6.4
8.7
8.8
8.8.1
8.8.2
8.9
8.9.1
8.9.2
8.9.3
8.9.4
This section describes the clock generator module (CGM). The CGM
generates the crystal clock signal, CGMXCLK, which operates at the
frequency of the crystal. The CGM also generates the base clock signal,
CGMOUT, which is based on either the crystal clock divided by two or
the phase-locked loop (PLL) clock, CGMPCLK, divided by two. This is
the clock from which the SIM derives the system clocks, including the
bus clock, which is at a frequency of CGMOUT/2. The PLL also
generates a CGMVCLK clock, at 48MHz, for use as the USBCLK. The
PLL is a fully functional frequency generator designed for use with
crystals or ceramic resonators.
This CGM is optimized to generate a 48MHz reference frequency for the
USB module, from a 6MHz crystal.
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Special Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . . 108
PLL Reference Divider Select Register (PRDS) . . . . . . . . 106
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
CGM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . 108
Acquisition/Lock Time Definitions . . . . . . . . . . . . . . . . . . . 108
Parametric Influences on Reaction Time . . . . . . . . . . . . . 109
Choosing a Filter Capacitor. . . . . . . . . . . . . . . . . . . . . . . . 111
Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . . 111
Clock Generator Module (CGM)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
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