IRISMPS3 International Rectifier, IRISMPS3 Datasheet - Page 3
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IRISMPS3
Manufacturer Part Number
IRISMPS3
Description
International Rectifier Kansas Street El Segundo CA 90245 USA
Manufacturer
International Rectifier
Datasheet
1.IRISMPS3.pdf
(15 pages)
about 100uA of quiescent current to flow which charges the Vcc capacitor C9. When the voltage at the Vcc pin of
the IRIS4013K reaches the positive undervoltage lockout threshold (V
will turn on the internal FET. Now the DC bus voltage is applied across the transformer primary winding, the FET
and the current sense resistors R15/R16. The current through the transformer primary, the FET and the current
sense resistors will start to ramp up. The rate of the ramp is dependent on the DC bus voltage and hence the input
line voltage (for example, the rate at 90VAC in is much lower than the rate at 230VAC in). The current ramps until
the voltage across R15/R16 reaches the Vth1 of the IRIS4013K (0.73V typ). During this time there is no current
flowing in either the bias winding or the output winding, because this is blocked by the diodes D3 and D1 respec-
tively.
the internal FET is switched off. Now the energy stored in the transformer causes the voltage at the Drain con-
nected end of the transformer to rise, and as a result the voltage at the bias winding and the output winding
changes from negative to positive. The output rectifiers now conducts and the energy is transferred to the output
and the bias winding. If there is a fixed full current load on the output it will take a number of cycles for the output
voltage to rise to the required level, and also it will take a few cycles for the bias winding to begin supplying power
to the Vcc pin of the IRIS4013K. Until this happens, C9 holds the voltage above the undervoltage lockout level
(Vccuv-) to make sure the circuit does not drop out. During this time the circuit cannot create enough voltage
signal through the delay circuit to activate the quasi-resonant operation, so the circuit operates with a fixed off time
of 50us (this is the pulse ratio control mode or PRC mode).
signal can be passed through the mode switching circuit & delay circuit D4/Q1/R11/D6 to the feedback (FB) pin
This will happen only if the Bias winding voltage is above the switching threshold of the mode switching circuit (the
operation of the mode switching circuit will be discussed in the next section). This will give a voltage above the
Vth2 threshold of the IRIS4013K, and this activates the quasi-resonant operation, holding the internal FET off until
all the energy is transferred from the primary side of the transformer to the secondary and bias outputs. When all
the energy is transferred, the quasi-resonant signal at the FB pin will start to fall until it can no longer supply the
1.35mA required by the IRIS4013K internal latch, and the FET is turned back on. This is also the lowest point of the
resonant voltage at the drain pin of the IRIS4013K (shown as point X in fig2 ), so results in reduced switching
losses.
resulting in a shorter ON time, but still the same off time as it still takes the same amount of time to transfer the
same energy to the output. The reduced ON time leads to a higher operating frequency.
(ISO1A/R9/D5/R5/R13/C13) will see an increase in the voltage, as the circuit is still passing the same energy to
the secondary side, but less current is being drawn. This causes the LM431 Precision Shunt Regulator (D5) to
conduct, causing to a current flow in the optocoupler ISO1A, which in turn gets passed across the transformer
boundary to the phototransistor part of the optocoupler ISO1B. This creates a voltage drop across R8, generating
an offset voltage at the FB pin thereby reducing the current required through the current sense resistors R15/R16
needed to reach a voltage of 0.73typ (Vth1 threshold) at the FB pin, and hence less energy is put into the trans-
former, reducing both the ON time and the OFF time.
IRIS device between quasi-resonant and PRC modes dependant on the output loading, with the aim of reducing
the power loss at light or no load.
is set at about 13V in this circuit, this results in a current through D4/R8/R12/D7 which causes enough voltage
across the base emitter junction of Q1 to forward bias it, which in turn allows the quasi-resonant signal to pass
www.irf.com
At the point when the voltage across R15/R16 reaches Vth1 this activates a comparator in the IRIS4013K and
Once the output capacitors C7 & C8 and the Vcc capacitor C9 are fully charged, the complete quasi-resonant
If the AC input voltage changes but the load stays constant, the primary current ramp will now be steeper
If the AC input voltage remains constant, but the load is reduced, the secondary side voltage monitoring circuit
Mode Switching Circuit Operation
The mode switching circuit consists of Q1/R8/C12/R12/D7 and is used to switch the operating mode of the
At full load the bias winding voltage is higher than the switching threshold of the mode switching circuit which
CCUV+
) , the IRIS4013K starts to operate and
IRISMPS3
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