MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 47
MC9S08GB32
Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC9S08GB32.pdf
(290 pages)
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It is possible to program the entire array through the single-wire background debug interface. Because no
special voltages are needed for FLASH erase and programming operations, in-application programming
is also possible through other software-controlled communication paths. For a more detailed discussion of
in-circuit and in-application programming, refer to the HCS08 Family Reference Manual, Volume I,
Freescale Semiconductor document order number HCS08RMv1/D.
4.4.1
Features of the FLASH memory include:
4.4.2
Before any program or erase command can be accepted, the FLASH clock divider register (FCDIV) must
be written to set the internal clock for the FLASH module to a frequency (f
200 kHz (see
reset initialization. FCDIV cannot be written if the access error flag, FACCERR in FSTAT, is set. The user
must ensure that FACCERR is not set before writing to the FCDIV register. One period of the resulting
clock (1/f
of these timing pulses is used by the command processor to complete a program or erase command.
Table 4-5
of FCLK (f
of cycles of FCLK and as an absolute time for the case where t
shown include overhead for the command state machine and enabling and disabling of program and erase
voltages.
Freescale Semiconductor
•
•
•
•
•
•
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FLASH Size
— MC9S08GB60/MC9S08GT60 — 61268 bytes (120 pages of 512 bytes each)
— MC9S08GB32/MC9S08GT32— 32768 bytes (64 pages of 512 bytes each)
— MC9S08GT16 — 16384 bytes (32 pages of 512 bytes each)
Single power supply program and erase
Command interface for fast program and erase operation
Up to 100,000 program/erase cycles at typical voltage and temperature
Flexible block protection
Security feature for FLASH and RAM
Auto power-down for low-frequency read accesses
FCLK
shows program and erase times. The bus clock frequency and FCDIV determine the frequency
Features
Program and Erase Times
FCLK
1
Table
Byte program
Byte program (burst)
Page erase
Mass erase
) is used by the command processor to time program and erase pulses. An integer number
Excluding start/end overhead
). The time for one cycle of FCLK is t
4.6.1). This register can be written only once, so normally this write is done during
Parameter
Table 4-5. Program and Erase Times
MC9S08GB/GT Data Sheet, Rev. 2.3
Cycles of FCLK
20,000
4000
9
4
FCLK
= 1/f
FCLK
FCLK
Time if FCLK = 200 kHz
= 5 µs. Program and erase times
. The times are shown as a number
FCLK
100 ms
20 µs
20 ms
45 µs
) between 150 kHz and
1
FLASH
47
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