COP87L89RB National Semiconductor, COP87L89RB Datasheet - Page 21

• Manufacturer Part Number: COP87L89RB
• Description: 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory/ CAN Interface/ 8-Bit A/D/ and USART
• Manufacturer: National Semiconductor

Functional Block Description of
the CAN Interface
Receive/Transmit (Rx/Tx) Registers
The Rx/Tx registers are 8-bit shift registers controlled by the
TCL and the BSP. They are loaded or read by the Interface
Management Logic, which holds the data to be transmitted
or the data that was received.
Bit Time Logic (BTL)
The bit time logic divider divides the CKI input clock by the
value defined in the CAN prescaler (CSCAL) and bus timing
register (CTIM). The resultig bit time (tcan) can be computed
by the formula:
Where divider is the value of the clock prescaler, PS is the
programmable value of phase segment 1 and 2 (1..8) and
PPS the programmed value of the propagation segment
(1..8) (located in CTIM).
Bus Timing Considerations
The internal architecture of the CAN interface has been op-
timized to allow fast software response times within mes-
sages of more than two data bytes. The TBE (Transmit
Buffer Empty) bit is set on the last bit of odd data bytes when
CAN internal sample points are high.
Figure 16 illustrates the minimum time required for t
In the case of an interrupt driven CAN interface, the calcula-
tion of the actual t
INT:
CANTX:
PUSH A
LD
PUSH A
VIS
•
•
A,B ; 2tc = 2 µs
;Interrupt latency = 7tc = 7 µs
; 3tc = 3 µs
; 3tc = 3 µs
; 5tc = 5 µs
;20tc = µs to this point
;which check
;transmit data
;additional time for instructions
;status prior to reloading the
LOAD
time would be done as follows:
(Continued)
FIGURE 15. Bit Rate Generation
FIGURE 16. TBE Timing
LOAD
.
21
It is the user’s responsibility to ensure that the time between
setting TBE and a reload of TxD2 is longer than the length of
phase segment 2 as indicated in the following equation:
Table 3 shows examples of the minimum required t
different CSCAL settings based on a clock frequency of
10 MHz. Lower clock speeds require recalculation of the
CAN bit rate and the mimimum t
Interrupt driven programs use more time than programs
which poll the TBE flag, however programs which operate at
lower baud rates (which are more likely to be sensitive to this
issue) have more time for interrupt response.
LD
PS
•
•
•
•
4
4
4
4
4
4
4
TABLE 3. CAN Timing (CKI = 10 MHz, t
CSCAL
TXD2,DATA
199
15
24
39
99
3
9
;bytes.
;registers with subsequent data
CAN Bit Rate (kbit/s)
DS100044-17
250
100
62
40
25
10
5
LOAD
.
DS100044-18
c
t
Minimum
LOAD
= 1 µs)
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12.5
100
2.0
5.0
8.0
20
50
LOAD
(µs)
for