W78E58B Winbond, W78E58B Datasheet - Page 5
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W78E58B
Manufacturer Part Number
W78E58B
Description
8 BIT MICROCONTROLLER
Manufacturer
Winbond
Datasheet
1.W78E58B.pdf
(31 pages)
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Timers 0, 1 and 2
Timers 0, 1, and 2 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0,
TL1 and TH1 for Timer 1, and TL2 and TH2 for Timer 2. The TCON and TMOD registers provide
control functions for timers 0, 1. The T2CON register provides control functions for Timer 2. RCAP2H
and RCAP2L are used as reload/capture registers for Timer 2. The operations of Timer 0 and Timer 1
are the same as in the W78C51. Timer 2 is a 16-bit timer/counter that is configured and controlled by
the T2CON register. Like Timers 0 and 1, Timer 2 can operate as either an external event counter or
as an internal timer, depending on the setting of bit C/T2 in T2CON. Timer 2 has three operating
modes: capture, auto-reload, and baud rate generator. The clock speed at capture or auto-reload
mode is the same as that of Timers 0 and 1.
Clock
The W78E58B is designed with either a crystal oscillator or an external clock. Internally, the clock is
divided by two before it is used by default. This makes the W78E58B relatively insensitive to duty cycle
variations in the clock.
Crystal Oscillator
The W78E58B incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be
connected across pins XTAL1 and XTAL2. In addition, a load capacitor must be connected from each
pin to ground.
External Clock
An external clock should be connected to pin XTAL1. Pin XTAL2 should be left unconnected. The
XTAL1 input is a CMOS-type input, as required by the crystal oscillator.
AUX-RAM 0H
the MOVX instruction. Address pointer are R0 and R1 of the selected register bank and DPTR
register. An access to external data memory locations higher than FFH will be performed with the
MOVX instruction in the same way as in the 8051. The AUX-RAM is disable after a reset. Setting
the bit 4 in CHPCON register will enable the access to AUX-RAM. When AUX-RAM is enabled the
instructions of "MOVX @Ri" will always access to on-chip AUX-RAM. When executing from internal
program memory, an access to AUX-RAM will not affect the Ports P0, P2, WR and RD .
Example,
CHPENR
CHPCON
MOV
MOV
ORL
MOV
MOV
MOV
MOVX
CHPENR, #87H
CHPENR, #59H
CHPCON, #00010000B ; enable AUX-RAM
CHPENR, #00H
R0, #12H
A, #34H
@R0, A
REG
REG
FFH is addressed indirectly as the same way to access external data memory with
F6H
BFH
; Write 34h data to 12h address.
- 5 -
Publication Release Date: March 18, 2002
W78E58B
Revision A3