UPD17073 NEC, UPD17073 Datasheet - Page 139

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

15.5 PLL Disable Status
register or PLL mode select register even the CE pin is high.
their previous contents; therefore, the original status of the synthesizer is restored when the CE pin goes high after
the CE pin has gone low and the PLL disable status has been set.
program.
Block
VCOL, VCOH pins
Programmable divider
Reference frequency generator
Phase comparator
Charge pump
The PLL frequency synthesizer stops its operation (i.e., is disabled) while the CE pin is low.
Similarly, the synthesizer stops when the “PLL disable status” is selected by the PLL reference frequency select
Table 15-3 shows the operations of the respective blocks when the PLL synthesizer is disabled.
The PLL reference frequency select register and PLL mode select register are not initialized on CE reset, but retains
To set the PLL disable status after the CE reset has been effected, initialization must be performed through
The PLL disable status is set on power-ON reset.
Table 15-3. Operations of Respective Blocks in PLL Disable Status
Condition
Floated
Division stopped
Output stopped
EO pin floated
CE pin = low (PLL disable)
select register = 0110B, 0111B
PLL reference frequency
CE pin = high
PLL mode select register
PD17072,17073
= 0000B
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