UPD17073 NEC, UPD17073 Datasheet - Page 182

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

19.5 Note on Processing of Each Pin in Halt and Clock Stop Statuses
be operated.
data memory.
19-2 must be observed.
Frequency counter
LCD controller/driver
General-purpose I/O
port
General-purpose input
port
General-purpose output
port
182
Program counter
System register
Peripheral register
Timer
PLL frequency synthe-
sizer
A/D converter
BEEP
Serial interface
Hardware peripheral
Note
The halt status is used to reduce the current consumption of the device when, for example, only the watch is to
The clock stop status is used to reduce the current consumption of the device to retain only the contents of the
Therefore, the current consumption must be minimized in the halt and clock stop status.
The current consumption may increase depending on the status of each pin and therefore, the points listed in Table
For the value to which these registers are initialized, refer to 4. DATA MEMORY (RAM), 5. SYSTEM
REGISTER (SYSREG) and 8. PERIPHERAL CONTROL REGISTER.
Table 19-1. Device Operations in Halt and Clock Stop Statuses
Stops at address before
HALT instruction
Retained
Retained
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
In halt status
CE pin = high level
STOP instruction is
invalid (“NOP”)
In clock stop status
Status
Stops at address before
HALT instruction
Retained
Retained
Normal operation
Disabled
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
Normal operation
In halt status
CE pin = low level
Initialized to 0000H and
stops
Initialized
Retained
Stops
Stops
Stops
Stops
Stops
Stops
Stops
Input port
Input port
Retained
In clock stop status
PD17072,17073
Note