HV51V7403HGL-5 Hynix Semiconductor, HV51V7403HGL-5 Datasheet - Page 9

• Manufacturer Part Number: HV51V7403HGL-5
• Description: 4M x 4Bit EDO DRAM
• Manufacturer: Hynix Semiconductor

Rev.0.1/Apr.01
Notes :
1. AC measurements assume t
2. AC initial pause of 200us is required after power up followed by a minimum of eight initialization cycles
3. Operation with the t
4. Operation with the t
5. Either t
6. Either t
7. V
8. Assumes that t
9. Measured with a load circuit equivalent to 1 TTL loads and 100pF.( V
10. Assumes that t
11. Assumes that t
12. Either t
13. t
14. t
15. These parameters are referenced to /CAS leading edge in early write cycles and to /WE
16. t
( any combination of cycles containing /RAS-only refresh or /CAS-before-/RAS refresh)
recommended value shown in this table, t
If the internal refresh counter is used, a minimum of eight /CAS-before-/RAS refresh cycle are required.
reference point only : if t
controlled exclusively by t
reference point only : if t
controlled exclusively by t
are measured between V
the data sheet as electrical characteristics only : If t
cycle and the data out pin will remain open circuit(high impedance) throughout the entire cycle :
If t
the data output will contain data read from the selected cell : if neither of the above sets of conditions
is satified, the condition of the data out (at access time) is indeterminate.
open circuit condition and is not referenced to output voltage levels
leading edge in delayed write or read-modify-write cycles
IH
OFF
WCS
RASP
RWD
(min) and V
(max), t
, t
>=t
defines /RAS pulse width in EDO p
ODD
DZO
RWD
RCH
RWD
or t
, t
or t
of t
OEZ
CWD
(min), t
DZC
CDD
IL
RCD
RRH
(max), t
(max) are reference levels for measuring timing of input signals, also transition times
RCD
RAD
, t
must be satisfied.
<=t
must be satisfied.
AWD
RCD
RAD
>=t
must be satified for a read cycles
>=t
CWD
RCD
RCD
(max) limit insures that t
(max) limit insures that t
and t
RAD
OFR
RCD
RAD
>=t
(max) and t
IH
CAC
AA
(max) and t
(max) and t
(min) and V
(max) and t
CWD
.
is greater than the specified t
is greater than the specified t
CPW
T
.
= 2ns
(min), t
are not restrictive operating parameters. They are included in
RAD
RCD
RCD
AWD
WEZ
IL
(max)
<=t
RAC
+ t
age mode cycles
(max) define the time at which the outputs achieve the
>=t
+ t
RAD
CAC
exceeds the value shown
CAC
AWD
(max). If t
RAC
RAC
(max) >= t
(max) <= t
(min), the cycle is a read-modify-write and
(max) can be met, t
(max) can be met, t
WCS
>=t
RCD
RAD
RCD
RAD
RAD
WCS
or t
(max) limit, then access time is
(max) limit, then access time is
+ t
+ t
(min), the cycle is an early write
HY51V(S)17403HG/HGL
RAD
AA
AA
(max)
(max)
is greater than the maximum
OH
RAD
RCD
=2.0V, V
(max) is specified as a
(max) is specified as a
OL
=0.8V)
9