UPD6376GS NEC, UPD6376GS Datasheet

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UPD6376GS

Manufacturer Part Number
UPD6376GS
Description
AUDIO 2-CHANNEL 16-BIT D/A CONVERTER
Manufacturer
NEC
Datasheets

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Document No. S12799EJ5V0DS00 (5th edition)
(Previous No. IC-2531)
Date Published December 1997 N
Printed in Japan
and low power consumption by using the CMOS process. It operates on a single 5-V power supply, and it is pin-
compatible with the PD6372 when Pin 1 is low level or open.
FEATURES
• Single 5-V power supply
• CMOS structure
• On-chip output operational amplifier circuit
• On-chip 0-point offset circuit
• Resistor string configuration
• 8 f
• On-chip 2-channel DAC
• L-R in-phase output
ORDERING INFORMATION
The PD6376 is an audio 2-channel 16-bit D/A converter.
The PD6376 has low sound quality deterioration by employing the resistor string configuration and 0-point offset,
S
(2 ch
PD6376GS
Part Number
400 kHz) supported
AUDIO 2-CHANNEL 16-BIT D/A CONVERTER
The information in this document is subject to change without notice.
The mark
DATA SHEET
16-pin plastic SOP (300 mil)
shows major revised points.
Package
MOS INTEGRATED CIRCUIT
PD6376
©
1991

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UPD6376GS Summary of contents

Page 1

AUDIO 2-CHANNEL 16-BIT D/A CONVERTER The PD6376 is an audio 2-channel 16-bit D/A converter. The PD6376 has low sound quality deterioration by employing the resistor string configuration and 0-point offset, and low power consumption by using the CMOS process. It ...

Page 2

BLOCK DIAGRAM Digital power supply block 13 LRCK/WDCK LRSEL/RSI 14 15 SI/LSI 16 CLK 1 4/8 f SEL S 2 D.GND Analog power supply block MAIN DAC SUB DAC SUB DAC MAIN DAC ...

Page 3

PIN CONFIGURATION (Top View) 16-Pin Plastic SOP (300 mil) 4/8 f SEL S D.GND NC D.V DD A.GND R.OUT A CLK 2 15 SI/LSI 3 14 LRSEL/RSI 4 13 LRCK/WDCK 5 12 A.GND 6 11 ...

Page 4

... GND pin to analog block Output Right analog signal output pin –– Power supply pin to analog block –– Reference voltage pin. Normally connected to A. GND through via capacitor to lower impedance Output Left analog signal output pin –– GND pin of analog block ...

Page 5

INPUT SIGNAL FORMAT • Input data must be input as 2’s complement, MSB first. 2’s complement is a method of expressing both positive numbers and negative numbers as binary numbers. See the table below. 2’s Complement (MSB) 0111 1111 ...

Page 6

Supplying Clock to CLK even outside Sample Data Interval 2.1.1 Serial data input (Pin 1 is Low or Open) Synchronize the reverse timing of LRCK with the falling edge of CLK upon completion of LSB input (Point A in ...

Page 7

Supplying Clock to CLK only during Sample Data Interval The analog outputs of the L.OUT and R.OUT pins are updated after the input of 4.5 clocks following data input. (See 4. ELECTRICAL CHARACTERISTICS, Timing Charts 1 and 2.) 2.2.1 ...

Page 8

USAGE CAUTIONS Insertion of a muting circuit in the next stage after the PD6376 is recommended muting circuit is inserted in the next stage, shock noise may be generated when power is applied. 8 PD6376 ...

Page 9

ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings ( Parameter Supply voltage Output pin voltage Logic input voltage Operating ambient temperature Storage temperature Caution If any of the parameters exceeds the absolute maximum ratings, even momentarily, the device ...

Page 10

TIMING CHART 1 • When Pin 1 is Low or Open (serial input) 4.5 clocks CLK MSB LSB LRCK (L-ch) (L-ch) LRCK L.OUT R.OUT Analog output update Note When the LRCK signal ...

Page 11

TIMING CHART 2 • When Pin 1 is High (parallel input) 4.5 clocks CLK LSB MSB LSI 1 N LSB MSB RSI WDCK L.OUT R.OUT Analog output update ...

Page 12

Typical Characteristics ( THD vs. Frequency Characteristics 1.0 0.5 0.3 0.2 0.1 0.05 (Full Scale) 0.03 0.02 0.01 0.1 0.2 0.3 0 Frequency f (kHz) Voltage Gain vs. Frequency Characteristics Note f 0 ...

Page 13

APPLICATION CIRCUIT EXAMPLE ( mode (L/R data serial input mode 384 f S LRCK CLK NPC SM5807 ...

Page 14

MEASURING CIRCUIT EXAMPLE PD6376 Anritsu MG22A 12 5 LRCK CLK Sampling frequency f = 88.2 kHz S 14 ...

Page 15

PACKAGE DRAWINGS 16 PIN PLASTIC SOP (300 mil NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition ...

Page 16

... The following conditions must be met when performing soldering for the PD6376. For more detailed information, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than the recommended conditions, please consult with an NEC sales representative. Surface Mount Type Soldering Conditions ...

Page 17

PD6376 17 ...

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PD6376 ...

Page 19

... Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar or NMOS devices ...

Page 20

... Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance ...

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