EVAL-SSM2518Z AD [Analog Devices], EVAL-SSM2518Z Datasheet - Page 28
EVAL-SSM2518Z
Manufacturer Part Number
EVAL-SSM2518Z
Description
Digital Input Stereo, 2 W, Class-D
Manufacturer
AD [Analog Devices]
Datasheet
1.EVAL-SSM2518Z.pdf
(48 pages)
- Current page: 28 of 48
- Download datasheet (3Mb)
SERIAL AUDIO INTERFACE AND SAMPLE RATE CONTROL REGISTER
Address: 0x02, Reset: 0x02, Name: Serial_Interface_Sample_Rate_Control
Table 15. Bit Descriptions for Serial_Interface_Sample_Rate_Control
Bits
7
[6:5]
[4:2]
[1:0]
SSM2518
Bit Name
RESERVED
SDATA_FMT
SAI
FS
Settings
000
001
010
011
100
101
110
111
00
01
10
11
00
01
10
11
Description
Reserved.
Serial Data Format. Only required if SAI = 000.
I²S standard; data is delayed by one BCLK cycle
Left justified
Right justified, 24-bit data
Right justified, 16-bit data
Serial Audio Interface Format.
I
2-slot TDM
4-slot TDM
8-slot TDM
16-slot TDM
Mono PCM
Reserved
Reserved
Manual Sample Rate Selection. Only required if ASR = 1 in Register 0x01.
8 kHz to 12 kHz
16 kHz to 24 kHz
32 kHz to 48 kHz
64 kHz to 96 kHz
2
S, left justified, or right justified stereo (depending on SDATA_FMT)
Rev. A | Page 28 of 48
Data Sheet
Reset
0x0
0x0
0x0
0x2
Access
RW
RW
RW
RW
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