ADSP2191MBSTZ140 Analog Devices, ADSP2191MBSTZ140 Datasheet

ADSP2191MBSTZ140

Manufacturer Part Number

ADSP2191MBSTZ140

Description

TQFP144

Manufacturer

Analog Devices

Datasheet

1.ADSP2191MBSTZ140.pdf (48 pages)

Specifications of ADSP2191MBSTZ140

Date_code

08+

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REV. A

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties that

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices.

DAG1

PERFORMANCE FEATURES

6.25 ns Instruction Cycle Time, for up to 160 MIPS

ADSP-218x Family Code Compatible with the Same

Single-Cycle Instruction Execution

Single-Cycle Context Switch between Two Sets of Com-

Instruction Cache Allows Dual Operand Fetches in Every

MULT

Sustained Performance

Easy to Use Algebraic Syntax

putation and Memory Instructions

Instruction Cycle

ADSP-219x

DSP CORE

DATA

FILE

DAG2

REGISTERS

RESULT

DM ADDRESS BUS

INPUT

16-BIT

PM ADDRESS BUS

PM DATA BUS

DM DATA BUS

SHIFTER

BARREL

SEQUENCER

PROGRAM

CONNECT

DMA

CACHE

24-BIT

ALU

FUNCTIONAL BLOCK DIAGRAM

DMA ADDRESS

ADDRESS

DMA DATA

I/O DATA

ADDRESS

FOUR INDEPENDENT BLOCKS

(MEMORY-MAPPED)

One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel:781/329-4700

Fax:781/326-8703

Multifunction Instructions

Pipelined Architecture Supports Efficient Code

Architectural Enhancements for Compiled C and C++

Architectural Enhancements beyond ADSP-218x Family

Flexible Power Management with User-Selectable

I/O ADDRESS

SYSTEM INTERRUPT CONTROLLER

I/O REGISTERS

Execution

Code Efficiency

are Supported with Instruction Set Extensions for

Added Registers, and Peripherals

Power-Down and Idle Modes

24 BIT

CONTROL

BUFFERS

STATUS

24 BIT

INTERNAL MEMORY

16 BIT

DATA

CONTROLLER

DATA

DSP Microcomputer

DMA

DATA

PROGRAMMABLE

ADSP-2191M

FLAGS (16)

SERIAL PORTS

EXTERNAL PORT

I/O PROCESSOR

HOST PORT

UART PORT

SPI PORTS

ADDR BUS

DATA BUS

(2)

(3)

(1)

TIMERS (3)

MUX

www.analog.com

EMULATION

TEST &

JTAG

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