P89C662HBA Philips Semiconductors, P89C662HBA Datasheet

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P89C662HBA

Manufacturer Part Number
P89C662HBA
Description
PLCC44
Manufacturer
Philips Semiconductors
Datasheets

Specifications of P89C662HBA

Date_code
05+

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The P89C66x family is available in 44-pin PLCC and
LQFP package types
Key Features
• More data RAM—up to 8 K bytes
• Supports the I
• Twice the speed of the conventional 80C51
• Flash In-System and In-Application Programmable
• Programmable counter array
• Watchdog timer
• Pin-compatible with 8xC652, 8xC654, 8xC528
P89C66x Product Family
P89C660
P89C662
P89C664
P89C668
Device
Flash Program Memory
2
C serial interface
16 K bytes
32 K bytes
64 K bytes
64 K bytes
1024 bytes
2048 bytes
512 bytes
8 K bytes
RAM
P89C66x
Microcontroller
P89C660, P89C662, P89C664, P89C668
Description
The P89C66x, based on the 80C51 family, has up to 64 KB
of Flash program memory and is set apart from other 80C51
derivatives with I
The P89C66x RAM to ROM ratio meets the designer’s
requirement for large data memory when writing C code.
The Flash program memory of the P89C66x supports both
parallel programming and 5 V serial ISP. Parallel-programmable
means the devices can be gang-programmed at high speed, thus
reducing programming costs and time to market. A default serial
loader (boot loader) program in ROM allows serial ISP of the
Flash memory without the need for a loader in the Flash code.
ISP allows a device’s program memory to be altered in the actual
end product. The capability to field-update the application
firmware makes a wide range of applications possible.
In addition, the P89C66x is In-Application Programmable
(IAP). Because the 66x contains a boot ROM, the Flash
program memory can be reconfigured even while the
application is running. User programs may erase and
reprogram the Flash memory at will through the use of
standard routines contained in ROM. With IAP, the
application can be updated remotely with changes or
enhancements in the field even while the application is
running, so there is no downtime or interruption of service.
A key feature of the P89C66x is its fast execution. The design
engineer can chose to run the application with the conventional
80C51 clock rate (12 clocks per machine cycle) or use the
default mode (six clocks per machine cycle) to achieve a
2x throughput improvement with the same clock frequency.
So, a 20 MHz P89C66x becomes a 40 MHz equivalent
microcontroller. Another way to benefit from this feature is to
keep the same throughput by reducing the clock frequency by
half, thus dramatically reducing electromagnetic interference.
Another way to benefit from this feature is to keep the same
throughput by reducing the clock frequency by half, thus
dramatically reducing electromagnetic interference.
The P89C66x is suitable for a wide variety of applications
that benefit from low EMI and the flexibility of Flash ISP
and IAP. It also supports applications that require pulse
width modulation, high-speed I/O and/or up/down counting
capabilities such as motor control. Because the P89C66x
family has I
Platform Management (IPMI) applications in servers and high-
end PCs where I
2
C, it is also extremely well suited for Intelligent
2
2
C serves as physical protocol for the interface.
C and RAM capacity up to 8 K bytes.

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