DM74ALS373N Fairchild Semiconductor, DM74ALS373N Datasheet

IC LATCH TRANSP OCTAL D 20-DIP

DM74ALS373N

Manufacturer Part Number
DM74ALS373N
Description
IC LATCH TRANSP OCTAL D 20-DIP
Manufacturer
Fairchild Semiconductor
Series
74ALSr
Datasheet

Specifications of DM74ALS373N

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
2ns
Current - Output High, Low
2.6mA, 24mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALS373

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© 2000 Fairchild Semiconductor Corporation
DM74ALS373WM
DM74ALS373SJ
DM74ALS373N
DM74ALS373
Octal D-Type 3-STATE Transparent Latch
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74ALS373 are transparent D-
type latches. While the enable (G) is HIGH the Q outputs
will follow the data (D) inputs. When the enable is taken
LOW the output will be latched at the level of the data that
was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS006220
Features
Switching specifications at 50 pF
Switching specifications guaranteed over full tempera-
ture and V
Advanced oxide-isolated, ion-implanted Schottky TTL
process
Functionally and pin for pin compatible with LS TTL
counterpart
Improved AC performance over DM74LS373 at approxi-
mately half the power
3-STATE buffer-type outputs drive bus lines directly
Package Description
CC
range
April 1984
Revised February 2000
www.fairchildsemi.com

Related parts for DM74ALS373N

DM74ALS373N Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS373SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS373N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Function Table Output Enable D Control LOW State H HIGH State X Don’t Care Z High Impedance State Q Previous Condition www.fairchildsemi.com Logic ...

Page 3

Absolute Maximum Ratings Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage ...

Page 4

Switching Characteristics over recommended operating free air temperature range Symbol Parameter t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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