SY10E160JC Micrel Inc, SY10E160JC Datasheet

SY10E160JC

Manufacturer Part Number

SY10E160JC

Description

IC PARITY GEN/CHKER 12BIT 28PLCC

Manufacturer

Micrel Inc

Series

10Er

Datasheet

1.SY10E160JZ.pdf (5 pages)

Specifications of SY10E160JC

Logic Type

Parity Generator/Checker

Number Of Circuits

12-Bit

Voltage - Supply

4.2 V ~ 5.5 V

Operating Temperature

0°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

28-LCC (J-Lead)

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Current - Output High, Low

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

SY10E160JC

Manufacturer:

Micrel Inc

Quantity:

10 000

Company:

BOSTOCK HK LIMITED

Part Number:

SY10E160JC TR

Manufacturer:

Micrel Inc

Quantity:

10 000

Current page: 1 of 5
Download datasheet (61Kb)

Micrel, Inc.

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

SHIFT

HOLD

CLK

S-IN

FEATURES

BLOCK DIAGRAM

Provides odd-HIGH parity of 12 inputs

Extended 100E V

Output register with Shift/Hold capability

900ps max. D to Q, /Q output

Enable control

Asynchronous Register Reset

Differential outputs

Fully compatible with industry standard 10KH,

100K ECL levels

Internal 75K input pulldown resistors

Fully compatible with Motorola MC10E/100E160

Available in 28-pin PLCC package

range of –4.2V to –5.5V

MUX

SEL

MUX

SEL

12-BIT PARITY

GENERATOR/CHECKER

generator/checkers with differential outputs, for use in

new, high-performance ECL systems. The output Q takes

on a logic HIGH value only when an odd number of inputs

are at a logic HIGH. A logic HIGH on the enable input (EN)

forces the output Q to a logic LOW.

Two multiplexers and their associated signals control the

data, loading the new parity data or shifting external data

in. To hold the present data, the Hold signal (HOLD) must

be at a logic LOW level. If the HOLD signal is at a logic

HIGH, the data present at the Q output is passed through

the first multiplexer. Taking the Shift signal (SHIFT) to a

logic HIGH will shift the data at the S-IN pin into the output

of the first multiplexer is then passed through to the register.

or CLK

reset pin (R) forces the register output Y to a logic LOW.

DESCRIPTION

The SY10/100E160 are high-speed, 12-bit parity

An additional feature of the E160 is the output register.

The register itself is clocked on the rising edge of CLK

(or both). The presence of a logic HIGH on the

Rev.: F

Issue Date: March 2006

SY100E160

SY10E160

SY100E160

Amendment: /0

SY10E160

Related parts for SY10E160JC

SY10E160JC Summary of contents

Page 1

Micrel, Inc. FEATURES Provides odd-HIGH parity of 12 inputs Extended 100E V range of –4.2V to –5.5V EE Output register with Shift/Hold capability 900ps max output Enable control Asynchronous Register Reset Differential outputs Fully compatible with ...

Page 2

... Contact factory for die availability. Dice are guaranteed Tape and Reel. 3. Pb-Free package is recommended for new designs. 2 (1) Operating Package Range Marking Commercial SY10E160JC Commercial SY10E160JC Commercial SY100E160JC Commercial SY100E160JC Commercial SY10E160JZ with Pb-Free bar-line indicator Commercial SY10E160JZ with Pb-Free bar-line indicator Commercial ...

Related keywords

SY10E160JC datasheet
SY10E160JC data sheet
SY10E160JC pdf datasheet
SY10E160JC component
SY10E160JC part
SY10E160JC distributor
SY10E160JC RoHS
SY10E160JC datasheet download

SY10E160JC Micrel Inc, SY10E160JC Datasheet

SY10E160JC

Specifications of SY10E160JC

Available stocks

Related parts for SY10E160JC

SY10E160JC Summary of contents

Page 1

Page 2

Page 3

Page 4

Page 5

Related keywords