HCF4021BEY STMicroelectronics, HCF4021BEY Datasheet

IC SHIFT REGISTER 8STAGE 16-DIP

HCF4021BEY

Manufacturer Part Number
HCF4021BEY
Description
IC SHIFT REGISTER 8STAGE 16-DIP
Manufacturer
STMicroelectronics
Series
4000Br
Type
Not Requiredr
Datasheet

Specifications of HCF4021BEY

Logic Type
Shift Register
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Parallel or Serial to Serial
Voltage - Supply
3 V ~ 20 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Technology
CMOS
Number Of Elements
1
Number Of Bits
8
Logic Family
4000B
Logical Function
Shift Register
Operating Supply Voltage (typ)
3.3/5/9/12/15/18V
Package Type
PDIP
Propagation Delay Time
320ns
Operating Temp Range
-55C to 125C
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
20V
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
16
Counting Sequence
Serial/Parallel to Parallel
Number Of Circuits
8
Supply Voltage (max)
20 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
Through Hole
Operating Supply Voltage
3 V to 20 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1352-5

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Part Number:
HCF4021BEY
Manufacturer:
ST
0
SERIAL IN/SERIAL OUT 8 - STAGE STATIC SHIFT REGISTER
DESCRIPTION
The HCF4021B is a monolithic integrated circuit
fabricated
technology available in DIP and SOP packages.
This device is an 8-stage parallel or serial input/
serial output register having common CLOCK and
PARALLEL/SERIAL CONTROL inputs, a single
SERIAL data input, and individual parallel "JAM"
inputs to each register stage. Each register stage
is a D-type, master-slave flip-flop in addition to an
output from stage 8, "Q" outputs are also available
from stages 6 and 7. Serial entry is synchronous
with the clock but parallel entry is asynchronous.
PIN CONNECTION
September 2001
MEDIUM SPEED OPERATION : 12 MHz
(Typ.) CLOCK RATE AT V
FULLY STATIC OPERATION
8 MASTER-SLAVE FLIP-FLOPS PLUS
OUTPUT BUFFERING AND CONTROL
GATING
QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
I
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
= 100nA (MAX) AT V
ASYNCHRONOUS PARALLEL IN OR SYNCHRONOUS
in
Metal
Oxide
DD
= 18V T
DD
- V
Semiconductor
SS
A
= 10V
= 25°C
ORDER CODES
In this device, entry is controlled by the
PARALLEL/SERIAL CONTROL input. When the
PARALLEL/SERIAL CONTROL input is low, data
is serially shifted into the 8-stage register
synchronously with the positive transition of he
clock
CONTROL input is high, data is jammed into the
8-stage register via the parallel input lines and
synchronous with the positive transition of the
clock line, the CLOCK input of the internal stage is
"forced" when asynchronous parallel entry is
made. Register expansion using multiple package
is permitted.
PACKAGE
SOP
DIP
line.
DIP
HCF4021BM1
HCF4021BEY
When
TUBE
the
HCF4021B
PARALLEL/SERIAL
HCF4021M013TR
SOP
T & R
1/11

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HCF4021BEY Summary of contents

Page 1

... CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple package is permitted. HCF4021B DIP SOP TUBE T & R HCF4021BEY HCF4021BM1 HCF4021M013TR line. When the PARALLEL/SERIAL 1/11 ...

Page 2

HCF4021B IINPUT EQUIVALENT CIRCUIT TRUTH TABLE CLOCK SERIAL INPUT Don’t Care LOGIC DIAGRAM 2/11 PIN DESCRIPTION PIN 13, 14, 15 ...

Page 3

ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Input Current I P Power Dissipation per Package D Power Dissipation per Output Transistor T Operating Temperature op T Storage Temperature stg Absolute Maximum Ratings ...

Page 4

HCF4021B DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V ...

Page 5

DYNAMIC ELECTRICAL CHARACTERISTICS (T Symbol Parameter CLOCKED OPERATION t t Propagation Delay Time PLH PHL t t Transition Time THL TLH (1) Maximum Clock Input f CL Frequency t Clock Pulse Width W Clock Input Rise or Fall t , ...

Page 6

HCF4021B TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance 200K pulse generator (typically OUT WAVEFORM 1 : PROPAGATION DELAY TIMES, CLOCK PULSE WIDTH (f=1MHz; 50% ...

Page 7

WAVEFORM 2 : SETUP AND HOLD TIMES (SI TO CLOCK) (f=1MHz; 50% duty cycle) WAVEFORM 3 : SETUP AND HOLD TIME (PI TO P/S) (f=1MHz; 50% duty cycle) HCF4021B 7/11 ...

Page 8

HCF4021B WAVEFORM 4 : PULSE WIDTH AND REMOVAL TIME (P/S TO CLOCK) (f=1MHz; 50% duty cycle) 8/11 ...

Page 9

Plastic DIP-16 (0.25) MECHANICAL DATA mm. DIM. MIN. a1 0. 17. TYP MAX. MIN. 0.020 1.65 0.030 0.5 0.25 20 8.5 2.54 7.1 5.1 3.3 1.27 HCF4021B inch ...

Page 10

HCF4021B DIM. MIN 0 0. 9 3.8 G 4 10/11 SO-16 MECHANICAL DATA mm. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.5 ...

Page 11

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...

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