MAX9175EUB+ Maxim Integrated Products, MAX9175EUB+ Datasheet

MAX9175EUB+

Manufacturer Part Number

MAX9175EUB+

Description

Manufacturer

Maxim Integrated Products

Datasheet

1.MAX9175EUB.pdf (14 pages)

Specifications of MAX9175EUB+

Pack_quantity

Comm_code

85423990

Lead_time

Current page: 1 of 14
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The MAX9174/MAX9175 are 670MHz, low-jitter, low-

skew 1:2 splitters ideal for protection switching, loop-

back, and clock and signal distribution. The devices

feature ultra-low 1.0ps

ensures reliable operation in high-speed links that are

highly sensitive to timing errors.

The MAX9174 has a fail-safe LVDS input and LVDS out-

puts. The MAX9175 has an anything differential input

(CML/LVDS/LVPECL) and LVDS outputs. The outputs

can be put into high impedance using the power-down

inputs. The MAX9174 features a fail-safe circuit that dri-

ves the outputs high when the input is open, undriven

and shorted, or undriven and terminated. The MAX9175

has a bias circuit that forces the outputs high when the

input is open. The power-down inputs are compatible

with standard LVTTL/LVCMOS logic. The power-down

inputs tolerate undershoot of -1V and overshoot of V

+ 1V. The MAX9174/MAX9175 are available in 10-pin

µMAX and 10-lead thin QFN with exposed pad pack-

ages, and operate from a single +3.3V supply over the

-40°C to +85°C temperature range.

19-2827; Rev 1; 4/04

Functional Diagram and Pin Configurations appear at end

of data sheet.

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Protection Switching

Loopback

Clock Distribution

670MHz LVDS-to-LVDS and Anything-to-LVDS

________________________________________________________________ Maxim Integrated Products

General Description

(RMS)

CLK1

CLK2

random jitter (max) that

Applications

MAX9174

CLOCK DISTRIBUTION

*Future product—contact factory for availability.

**EP = Exposed paddle.

MAX9174EUB

MAX9174ETB*

MAX9175EUB

MAX9175ETB*

1.0ps

80ps

+3.3V Supply

LVDS Fail-Safe Inputs (MAX9174)

Anything Input (MAX9175) Accepts Differential

CML/LVDS/LVPECL

Power-Down Inputs Tolerate -1.0V and V

Low-Power CMOS Design

10-Lead µMAX and Thin QFN Packages

-40°C to +85°C Operating Temperature Range

Conform to ANSI TIA/EIA-644 LVDS Standard

IEC 61000-4-2 Level 4 ESD Rating

PART

(P-P)

(RMS)

MAX9176

Jitter (max) at 800Mbps Data Rate

Typical Application Circuit

Jitter (max) at 670MHz

-40 C to +85 C

TEMP RANGE

Ordering Information

CLK IN

ASIC

1:2 Splitters

PIN-PACKAGE

10 µMAX

10 Thin QFN-EP**

10 µMAX

10 Thin QFN-EP**

Features

+ 1.0V

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