24LC256-I/S15K Microchip Technology Inc., 24LC256-I/S15K Datasheet

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24LC256-I/S15K

Manufacturer Part Number
24LC256-I/S15K
Description
DICE 0/256K, 32K X 8, 2.5V SER EE DIE IN WAFFLE PK
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of 24LC256-I/S15K

Pack_quantity
1
Comm_code
85423275
Lead_time
21
Eccn
EAR99
Device Selection Table
Features:
• Single Supply with Operation down to 1.7V for
• Low-Power CMOS Technology:
• 2-Wire Serial Interface, I
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 5 ms max.
• Self-Timed Erase/Write Cycle
• 64-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 years
• Factory Programming Available
• Packages Include 8-lead PDIP, SOIC, DFN,
• Pb-Free and RoHS Compliant
Package Types
*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.
 1998-2011 Microchip Technology Inc.
Note 1:
24AA256
24LC256
24FC256
24AA256 and 24FC256 Devices, 2.5V for
24LC256 Devices
- Active current 400 uA, typical
- Standby current 100 nA, typical
TSSOP and MSOP
Number
Note 1: * Pins A0 and A1 are no connects for the MSOP package only.
Note 2: Available in I-temp, “AA” only.
Part
V
A0
A1
A2
SS
2:
1
2
3
4
100 kHz for V
400 kHz for V
PDIP/SOIC
1.7-5.5V
2.5-5.5V
1.7-5.5V
Range
V
CC
8
7
6
5
256K I
CC
CC
2
V
WP
SCL
SDA
C
Max. Clock
CC
< 2.5V.
< 2.5V.
Frequency
400 kHz
1 MHz
400 kHz
Compatible
(2)
V
2
(1)
A0
A1
A2
SS
24AA256/24LC256/24FC256
C
TSSOP/MSOP
1
2
3
4
Ranges
Temp.
CMOS Serial EEPROM
I, E
I
I
8
7
6
5
(1)
V
WP
SCL
SDA
CC
• Temperature Ranges:
Description:
The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.7V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications or data acquisition.
This device also has a page write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 2 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIC, TSSOP, MSOP and DFN packages. The
24AA256 is also available in the 8-lead Chip Scale
package.
Block Diagram
SDA
I/O
- Industrial (I):
- Automotive (E):
Control
Logic
V
V
V
A0
A1
A2
I/O
SS
CC
SS
SCL
1
2
3
4
DFN
A0 A1A2
Memory
Control
Logic
8
7
6
5
WP
V
WP
SCL
SDA
CC
-40C to +85C
-40C to +125C
WP
XDEC
CS (Chip Scale)
SDA SCL V
V
1
CC
6
(TOP DOWN VIEW,
BALLS NOT VISIBLE)
4
DS21203R-page 1
A1 A0
2
7
HV Generator
Page Latches
5
Sense Amp.
R/W Control
EEPROM
3
8
Array
YDEC
SS
(2)
A2

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